Then, I asked for the IP vendors themselves to respond to a set of questions. Here's one letter to the editor:

Editor,

IP is the bedrock of the SoC industry. Who can imagine designing a SoC on a leading-edge process, such as 90nm, 65nm or below, without using IP in the form of processors, memories, standard cells, I/Os, application-specific function blocks and mixed-signal converters?

IP holds the key to the future of the semiconductor industry and there are many talented engineers who are working hard to deliver the full potential of these intellectual property building blocks.

The beauty of these IP blocks or cores revolves around the fact that they are industry-standard, reusable, energy efficient, versatile and can meet the time-to-market, time-to-revenue demands of semiconductor designers and their end customers. The availability of these IP building blocks helps speed the actual design onto a system-on-a-chip, thus addressing performance, market timing and form- factor issues.

''Form factor'' and ''power management'' are two of the most important phrases on the tips of the tongues of design engineers, particularly those serving the consumer and wireless markets. A single-chip design with integrated IP building blocks addresses the demands of the consumer market for even-smaller ICs. And of course there is also the demand for greater performance and low-power consumption, issues directly proportionate to the rapid growth of the consumer and wireless markets.

Analog and memory IP will be critical to the success of designs at 45nm and below. At this level essentially all IP building blocks will be analog and that presents a mammoth challenge for the design community. The global analog skill shortage will have to be addressed through quantum improvements in productivity especially in tools and methodologies. This is a challenge and is topic number one with designers around the world. SoCs require more silicon proven IP to ensure the success of product designs.

The global need to reduce power consumption and to extend battery life is paramount of the minds of design engineers. The trend is toward reducing the need for interconnect to auxiliary chips, and thus reducing power usage. The implementation of reusable intellectual property building blocks onto only one chip is essential to successfully addressing global energy issues.

In areas where the IP enables key product differentiation features at a system level users will always seek to customize their instantiation with an inherent increase in design and ultimately product risk. The solution to IP quality challenges is to use a quality vendor with the right sort of integration support and to be ready to pay for the quality.

For S3, industry-standard intellectual property reuse and related design services form the core of our business. Some may suggest that IP is going south, but our business results suggest the opposite. S3 is on the path right now in which IP licensing is the fastest growing part of the company's growing total revenues increasing at 100% per year.

The strength and completeness of a design company's intellectual property library -- processors, memory, logic, IP cores, I/Os -- have literally been the difference between success and failure in this increasingly competitive market. The IP licensing market, just like all other segments of the semiconductor business, is not immune from the notorious cyclicality that impacts the business. However, the very strict need to meet market windows, carefully manage power and deliver performance will require even more IP reuse in the coming years.

Regards,
Bob Tait
Marketing Director
S3