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Toshiba to move flash memory to 55-nm process in 2007
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Silicon Strategies


TOKYO -- Toshiba Corp. said Monday (May 17) it expects to begin making NAND flash chips on a 55-nanometer manufacturing process in 2007.

The company said it expects the market for NAND flash to see 30 percent annual growth from approximately US$3.5 billion in 2003 to approximately US$11 billion in 2007. By the third quarter of 2004, Toshiba plans to introduce a 16-Gbit NAND flash device by combining four 4-Gbit die in a single package, the company said.

The roadmap for further lithography advances calls for mass production at 70-nanometer to start in the first half of fiscal year 2005 at Toshiba's existing 200-mm fab and in the first half of fiscal year 2006 at a new 300-mm fab, the company said. Mass production of 55-nm NAND flash is scheduled to start in calendar year 2007 at the new fab.






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