LONDON — Foundry chip supplier Taiwan Semiconductor Manufacturing Co. Ltd. has not yet committed itself to extreme ultraviolet lithography (EUVL) as the next means of making integrated circuits. The company is still backing two horses in the race to the next lithography, EUVL and clustered electron-beam.
Jack Sun, vice president of R&D at TSMC, revealed some details of progress while speaking at the IMEC Technology Forum in Brussels last week.
The main theme of Sun's talk was the need for cooperation and collaboration in the supply chain, but under that he put up some slides discussing the challenge of overcoming lithography cost hurdles and it is clear that the idea that future lithography machines could cost $40 million or $60 million each is a concern to TSMC.
"TSMC will push for cost-effective lithography," said Sun as he proposed the possibility that clustered direct-write e-beam lithography could approach 100 wafers per hour throughput, a benchmark of industrial production using optical lithography.
TSMC is currently investigating both EUV litho with ASML Holding NV (Veldhoven, The Netherlands) and e-beam lithography with Mapper Lithography BV (Delft, The Netherlands). ASML has an EUV advanced development tool installed at IMEC (Leuven, Belgium) while Mapper is delivering a 300-mm maskless e-beam lithography platform to CEA-Leti in Grenoble.
Apparently showing a little of bit of the carrot and the stick to leading EUV lithography equipment developer. Sun said: "We welcome proposals in EUV to move from 0.25 NA [numerical aperture] to 0.35 NA and take throughput to 100 wafers per hour." ASML is said to have five orders for its first pre-production EUV tool the NXE 3100 and TSMC along with Intel is expected to be among the recipients.
But Sun also listed some of the challenges remaining; EUV source power, mask making and mask integrity and defect inspection. And he went on to present slides detailing how Mapper's technology could provide for 13,000 individual beams in a chamber to expose an IC masklessly at a rate of 10 wafers per hour and the possibility of clustering ten such machines together to achieve 100 wafers per hour.
Sun emphasized that the need to work on 22-nm CMOS, EUV and e-beam was one of the reasons the company was formally creating an R&D center in Europe based at IMEC in Leuven.
www.mapperlithography.com
Mapper, CEA-Leti hatch maskless litho effort
ASML tips roadmap for EUV litho production platform
ASML moves up in fab tool rankings
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