Advanced Micro Devices Inc. today introduced a flash memory architecture, dubbed Mirror Bit, that is said to hold twice as much data as standard flash without what AMD claims are limitations associated with multi-level cell (MLC) solutions.
"We agree that it makes a lot of sense to put two bits in a cell, but ours is a very different approach," said Kevin Plouse, vice president of technical marketing for the Sunnyvale company's memory group.
One drawback associated with MLC, used by rival Intel Corp., is the reliability of charge retention due to the close proximity of electrical charges in the cell, according to AMD.
The Mirror Bit architecture overcomes this problem because the new architecture stores two bits of data in one cell by dividing each standard cell into two discrete and independent units, the company said. Each bit in the memory cell is physically in a different location, so the bits are independent and do not interact with each other, said Plouse.
AMD will release 64-Mb flash memory products based on the technology during the first quarter of 2002 and 256-Mb products in the third quarter of 2002, Plouse said. Pricing has not yet been determined, he said.
"We're announcing this today because we have the technology working," Plouse said. "In today's market, customers have to decide what to do about higher density flash needs."
AMD said that products based on the Mirror Bit technology will be pin-compatible with standard 3-volt products, allowing customers to integrate the new architecture without changing their system designs.
AMD's technology is a unique approach to increasing storage density without increasing the die size, said Brian Matas, an analyst with IC Insights Inc., Scottsdale, Ariz.
"If they can double the density, without doubling the cost, that bodes well for a lot of consumer applications that are very price sensitive, such as MP3 players and digital cameras," Matas said.