United Business Media EE Times


Search

HOMEMARKET INTELLIGENCE UNITFORUMSDESIGNNEW PRODUCTSCAREERSBLOGSCONTACTEVENTSSIGN UP!RSSMost Popular contentTrusted Sources

 


Show us the (mixed-signal) specs
Print this article Email this article Reprints RSS Digital Edition

EE Times


Stephan OhrI'm getting pressure to do more analog. You know, write about standard linear components and talk about some of their specs.

These days few people can say "system-on-a-chip" without also saying, "mixed-signal." A lot of these ASSPs are engineering feats and incredible moneymakers. But the analog lobby, which is pretty strong these days, is saying, "Never mind SoC integration; tell us more about specs."

In principle, mixed-signal ICs are devices with clearly identifiable analog and digital circuit blocks-you could call them "mixed analog-digital." But in practice, mixed-signal has become a buzz word for all sorts of processors, devices that once upon a time had analog signals but are now, for all practical purposes, big digital logic chips fashioned in TSMC CMOS.

Don't misunderstand: These CMOS devices are the workhorses of traditional analog applications like communications, multimedia, disk-drive read channels. It's just that their base technology-DSP-is far removed from the voltages and currents the hardcore analog community likes to manipulate.

The issues for analog designers are far more granular, much closer to the physics of the device. You want precision and speed, without a lot of noise or power consumption. It's difficult juggling all these specs without tweaking processes and circuitry. But unless they are working in BiCMOS, the mixed-signal designers don't get that close to bias currents and threshold voltages. Noise is something that'll cost 20,000 to 50,000 logic gates to filter, they figure, rather than a process tweak.

Though sometimes little more than a respin of a 10-year-old design, op amps, data converters and voltage regulators represent an incredible amount of engineering. Think about this: What kind of process builds a precision op amp with a 100-microvolt input offset and input bias current of 10 nanoamps? What process builds a 350-MHz amplifier that uses a little over 4 mA of supply current? Or a 100-mA low-dropout regulator with 40 microvolts of rms noise? Who engineered a 24-bit A/D converter that consumes only 200 microamps?

I hope to write more on this stuff in my columns here. After all, I'm the guy who moved to California-changed my whole life around-20 years ago because I thought 3 nV per square route of hertz was a good spec.





The views and opinions expressed in this column are strictly those of the author and should not be taken as an editorial position of EE Times or any of its other editors, publications or Web sites.


  Free Subscription to EE Times
First Name Last Name
Company Name Title
Email address
  Click here for your Free Subscription to EETimes Europe
 
CAREER CENTER
Looking for a new job?
SEARCH JOBS
SPONSOR

RECENT JOB POSTINGS
CAREER NEWS
SRC Expands R&D Centers
The Semiconductor Research Corp has added a new center to its university R&D efforts.

For more great jobs, career related news, features and services, please visit EETimes' Career Center.


All White Papers »   

 
Education and
Learning


Learn Now:












Home | About | Editorial Calendar | Feedback | Subscriptions | Newsletter | Media Kit | Contact | Reprints|  RSS|   Digital|  Mobile
Network Websites
International
Network Features




All materials on this site Copyright © 2009 TechInsights, a Division of United Business Media LLC All rights reserved.
Privacy Statement | Terms of Service | About