Semiconductor analyst Jim Turley has revived the "death of ASIC" mantra, and this time, the numbers bear out the epitaph. Turley came to Colorado Springs, Colo., earlier this month to talk to the inaugural meeting of ColoradoChips, an interest group that includes several developers and users of ASICs who were ready to treat his speech as an inquisition of sorts. Turley stressed that ASICs would never go away completely, but that the shrink from 5,000 to 1,700 design starts per year in the past seven years was not merely an artifact of the recession, but a sea change in how designers contemplated cost-benefit analyses.

NREs were justifiable when venture dollars flowed freely, Turley said, but that well has run dry, even as EDA tools have failed to keep up with system-on-chip complexity. The result is that most OEMs are better served by standard implementations of integer processors, at least on the control plane.

The benefit to the network processor developer is not automatic, however. Since the recovery is hitting the simplest and most consumer-oriented systems first, control plane processors are the immediate beneficiaries, and often those on the 8- and 16-bit end of the scale. New NPU architecture introductions in the past six months have stressed 10-Gbit, 32-bit multiprocessing forwarders and classifiers. There may be some applications in aftermarket line cards, but there has not been an upturn in design starts for new routers and multiservice switches.

The most alluring solution, Turley said, is the more complex reconfigurable programmable logic being developed by FPGA vendors. Large FPGAs can represent the fastest way to get to market, Turley said, but they are as habit-forming as heroin: Because system developers never are given the time to redesign, the pricey FPGA remains in the system forever. Turley quipped that the FPGA has become so addictive, "the vendors should give away the first one for free, because they know how seriously you can get hooked."