The concept is interesting. Instead of designing new hardware for each system-on-chip application, why not compile a set of programmable processors into an off-the-shelf platform chip? This chip could be made in greater volumes than any application-specific SoC, could cover a range of similar applications and would be bound to a particular application by its firmware, not by hardware changes.

This amounts to replacing custom hardware with deeply embedded microcomputers. As CPU cores become faster and smaller, more tasks can be done in firmware instead of dedicated hardware at similar costs, and fewer tasks actually require dedicated hardware designs.

All this makes conceptual sense. But the driving force behind platform-based SoC design may be economic and practical, rather than conceptual and architectural. Some hard realities are setting in for the extreme submicron world. One of them, as EE Times has mentioned often, is the growth in mask charges. With some folks paying more than $250,000 for a single mask set, the club of people who can afford an extreme submicron ASIC or COTS design is getting pretty exclusive. This problem, if it's not corrected by the mask shops or mitigated by aggressive brokering of multidesign mask sets, will eventually drive a lot of business into the waiting arms of the PLD vendors. It will also likely make more managers think about platform-based solutions.

Another trend may force a wholesale migration. That is the EDA industry's failure so far to cope with the growing problems of accurately modeling interconnect. We are hearing cries from many folks using advanced processes that they need tools for a whole portfolio of problems that used to be trivial: power density, metal migration, capacitive-and recently, inductive-coupling, thermal issues, resistance and on and on.

I suspect that these problems will be addressed, one by one. The result will be a more torturous path from acceptable behavioral RTL to a reliable physical design: a path requiring more skills from the designers, more expensive tools and more time. In short, a path open only to an industry elite, working on chips that will be sold at high margins or enormous volumes. Except at places like Sony or Intel, most SoC designs won't meet those criteria. But a widely used platform chip could. Platform chips may become, of necessity, not an alternative way of implementing SoCs, but the only way open to most design teams.