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Application-specific tack to guide next-gen design
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EE Times


Application-specific tack to guide next-gen design It's an exciting time to be an electronics engineer, for you are at the center of a revolution, your designs in demand by essentially the entire consuming public.

The drive to system-on-chip (SoC) design for this growing number of consumer electronics products has created an interesting dynamic and a challenge for the industry: SoC design complexity is extending the project cycle, but the pressure to reduce project cycles is intensifying.

Trying to meet these conflicting demands, the industry has created a fork in the design flow path. Companies are forced down alternative design paths depending on the level of differentiation that electronics companies achieve through state-of-the-art hardware vs. improved economies of scale derived from using configurable system platforms.

Many companies use ongoing product development, with hardware redesigned at longer intervals than new product release cycles and intermediate products based on fixed hardware "platforms" combined with enhanced software.

These companies have moved toward a design scenario in which they develop a generic hardware platform, then update its functionality using software or configurable hardware blocks. The drawback is that it is difficult to differentiate a product based on state-of-the-art hardware components when that hardware quickly becomes obsolete.

The advanced hardware-centric flow follows the more traditional approach of parallel hardware/software development. But given silicon transistor density and available die sizes, putting more-complex functionality in a single chip has pressed the limits of existing design methodologies. New techniques must evolve that facilitate the productivity improvements required for super-dense devices.

While this divergence in design practices evolves, the growth in silicon area to allow SoC design is producing a convergence of communications, computers and consumer. This convergence of differing specialization requires diverse engineering teams or the use of intellectual property (IP) swapped between groups with differing expertise.

The platform-based approach divests the more intricate hardware design phase and focuses on interconnect blocks and test software. Communication-oriented design becomes key, as the data swap between blocks, even using standard bus formats, becomes the most complex hardware design element.

Driving productivity in these scenarios while bridging their gaps is the target of new design languages like Superlog.

As electronics companies strive to make efficient use of their most valuable resources, application-specific methodologies will form and methodology developers who latch on to this trend will set the pace for next-generation design.

Dave Kelf is Vice President of Marketing, Co-design Automation Inc. (San Jose, Calif.).





The views and opinions expressed in this column are strictly those of the author and should not be taken as an editorial position of EE Times or any of its other editors, publications or Web sites.


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