Perhaps the industry will remember 2000 as the year network processors (NPUs) became a much-discussed product category. If so, 2001 will be remembered as the year NPUs actually started shipping.
Despite months of hype, there are still few NPUs in production. Though Intel and MMC (now part of AMCC) have been shipping their network processors for months, NPUs from Agere, IBM, Motorola and Vitesse are not quite or just barely in production.
It's no coincidence that Agere, Motorola and Vitesse are also struggling to merge acquired NPU design teams into a larger organization. MMC, in contrast, was shipping product well before the AMCC deal, and Intel acquired its NPU design from Digital Semiconductor three years ago.
Motorola's C-5 has been the hardest hit, slipping more than a year from the schedule C-Port announced before it was acquired. Like Agere and Vitesse, Motorola has been hurt by the departure of key talent from the original design team.
A second problem is the sheer complexity of creating a production-quality network processor. Wringing every last problem out of a new instruction-set architecture is always a time-consuming task. Toss in a few performance shortfalls, and you have a recipe for delays.
NPU vendors have also discovered that software is a key part of the platform. Creating development tools and reference platforms has further slowed product rollouts.
By the end of this quarter, however, we should finally see some new devices entering production as well as several announcements from established vendors and startups. The new NPUs will give OEMs a variety of solutions for Gigabit Ethernet, OC-48 line cards and similar equipment. I am now tracking 20 vendors of NPUs and similar products (see www.linleygroup.com/npu), enough to flood the market with all kinds of new devices.
Some will expand the performance range, reaching as high as OC-192 Layer 7. Others will blur the definition of control plane and data plane. Several will try unusual microarchitecture techniques to increase packet throughput. Some will eschew instruction execution altogether in favor of fixed-function logic.
Microarchitecture is moot, however, if vendors can't get their chips to market. With brutal competition about to commence, the NPU vendors most likely to succeed will be those that execute on their product plans, meeting both performance and schedule goals.
Linley Gwennap is the Founder and Principal Analyst of the Linley Group, a Technology Analysis Firm in Mountain View, Calif.