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Net ASICs take on NPUs
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Linley GwennapNetwork processors (NPUs) have been in the public eye for barely a year but are already coming under attack from a product that doesn't even have a name yet.

These new chips, which rely solely on hard-wired logic to handle packets, take the "processor" out of network processor. They are more akin to the in-house ASICs designed by large network equipment vendors, so for the sake of discussion, let's call them network ASICs.

Entridia, the most vocal proponent of this approach, is already shipping an OC-12 product and recently announced a two-chip OC-48 solution. Other startups are designing hard-wired chips but have not yet disclosed their products.

Network ASICs offer many of the benefits of network processors. OEMs can purchase either type of device and immediately plug them into a system design, eliminating the up-front time and expense to design their own ASICs.

In fact, network ASICs may get OEM's products to market even faster than with network processors, as they also eliminate the software effort required by NPUs.

Like NPUs, network ASICs can perform a variety of routing functions and can be configured to meet OEMs' needs.

OEMs can add value to the network ASIC by writing control-plane software, which runs on a separate control processor. The ASIC can also be combined with various switch fabrics, coprocessors and line interfaces to create unique system designs.

The classic trade-off in any ASIC-vs.-CPU debate is performance vs. flexibility. A well-designed ASIC should deliver better performance than a CPU of comparable cost, because hard-wired logic is more efficient. This performance advantage is important in networking applications, as today's programmable NPUs can't deliver a full feature set at OC-48 speed.

NPU vendors argue that their flexibility offsets the potential loss of performance. A programmable NPU can handle just about any protocol. With a software update, an OEM can add new features or fix bugs, even in systems that are already in the field. Try that with an ASIC! Field upgrades sound good, but performance-constrained network processors typically don't have enough spare cycles to support new features. NPUs still have clear advantages for Layer 7 applications and other complex tasks. But for more basic functions, network ASICs will give them a run for their money.

Linley Gwennap, Co-author of "A Guide to Network Processors" (www.linleygroup.com/npu), is principal analyst of the linley group.





The views and opinions expressed in this column are strictly those of the author and should not be taken as an editorial position of EE Times or any of its other editors, publications or Web sites.


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