Nearly every day, Bijan Davari goes to the whiteboard at the meeting room at IBM Microelectronics and writes a capital T, followed by a small, looping l.

Representing technology leadership, Tl is the mantra preached by Davari, who is vice president of technology and emerging products at IBM Microelectronics, to his colleagues around the globe.

IBM can claim to be the pioneer in two key process technology areas: silicon-on-insulator and silicon germanium. It will be interesting to see whether the company can parlay those technologies into profits. With SOI, IBM is trying to hook a big fish: AMD, which has stated that it will use SOI for its Hammer line of processors.

IBM has licensed AMD to use certain intellectual property, including design practices but not process technology, that would allow the microprocessor vendor to "design more or less to our SOI process."

AMD and Motorola cooperate on logic process development, and Motorola also has said it will use SOI for its high-end PowerPCs. But Davari and others at IBM claim that because IBM is already in production with SOI, AMD is leaning toward IBM as its foundry partner. If it works out that way, Motorola would have to look elsewhere for its SOI foundry plans.

"SOI's starting point is in high performance, but the industry is waking up to the low-power attributes of SOI," Davari said. "You have to look at the power delay product, and for these dense server farms when you go to increase the processing power by four times, you have to look at the power consumption. Just the air conditioning in these rooms is becoming a big challenge, and so people are really interested in SOI."

The big question about SOI is cost, which relates somewhat to wafer availability. IBM claims that SOI involves only a 10 percent cost adder to the overall finished wafer. Dan Hutcheson, president of VLSI Research, claims that is a best-case scenario and that using SOI will prove expensive and difficult.

Davari bases many of his arguments for SOI on a belief that squeezing performance gains out of bulk CMOS will grow increasingly difficult over the remainder of this decade. "Bulk is saturating, and it is a fundamental problem of threshold voltage scaling. With SOI, you can handle the Vt in a nonscaling manner."

And that's another way of expressing Davari's pet concept of Tl.

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