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Designers face a more programmable future
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EE Times


The hot topic in signal processing is the transition away from ASIC-based solutions toward programmable ones (FPGAs or DSPs). That transition introduces flexibility that only design engineers see, but what's needed is to make it available to end users.

Today's handsets and basestations are fixed-function devices. Adding functionality requires throwing existing hardware into the trash. End users would prefer gaining new functionality through software upgrades, which represent a competitive advantage and provide an opportunity for technology pioneers to gain market share.

Holding back software upgrades is the hard division between a data plane and a control plane-a holdover from the ASIC epoch. When a DSP directly replaces an ASIC, the number of lines of code is small and manageable. The small line count makes it possible for a programmer to craft DSP code for performance-thus assembly language programming is popular for the task.

This usage model encourages DSP chip designers to leave out programmer productivity hardware such as a memory management unit (MMU), which enables memory protection and software modularity. In short, a DSP chip in the data plane runs a short, static "algorithm" created by a programmer who favors performance over readability, modularity or portability.

The situation will change, however. The number of lines of code running in the DSP will grow so that modularity will become the norm. Designers will treat DSP chips less like ASICs and more like control processors.

To enable software upgrades, engineers must deploy a software framework on the data side that can accept them. In a software radio, for example, that framework is an embedded common object-request broker architecture (Corba) ORB. If the ORB hosts about five waveforms, a software radio can host about a million lines of code in the data plane.

Signal-processing designers will make the transition easier if DSP architecture enhancements emerge. Three obvious alternatives exist. One involves adding a DSP unit to a microcontroller. A variant would combine an MCU core with one or more DSP cores on a single die. The latter example is a DSP farm on a chip.

The second solution is to enhance a DSP chip to host a million lines of software-possibly by adding a primitive MMU and a complete real-time operating system.

The final option involves using the new FPGA chips that include an MCU core-a duplicate of the data and control plane paradigm in a microcosm on a single die.

We'll see which option wins.

Craig Lund is Chief Technology Officer, Mercury Computer Systems Inc. (Chelmsford, Mass.).





The views and opinions expressed in this column are strictly those of the author and should not be taken as an editorial position of EE Times or any of its other editors, publications or Web sites.


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