Jason Woo, a UCLA professor who attended the recent Symposium on VLSI Technology in Kyoto, said, "If you look at the high-performance market, SOI is already happening. Companies look at both bulk and SOI and try to figure out how to optimize" for their applications. The same thing will happen for strained silicon, he predicted.

"From all of our simulations, if you look at Moore's Law, we will not see the traditional performance gains by the 65-nm generation, which goes into mass production in 2007," Woo said. "Unless we do something, planar CMOS is not going to give us the performance we need."

Even Intel technologists, who tend to champion bulk silicon (as opposed to SOI) say that had the industry prepared for SOI a decade ago, with the wafer infrastructure and design tools needed to draw out the performance, SOI would be more attractive to Intel today. As it is, SOI is not cost-effective, particularly as Intel makes the massive shift to 300-mm wafers.

The problem facing CMOS is not density scaling, but a gradual degradation of electron mobility. "We need some kind of transport enhancement," Woo said.

The high-k gate materials tried out so far have prevented electron tunneling through the gate, but they also have slowed mobility. What's more, the short-channel effect requires doping profiles that also slow performance.

The answers are not simple. Fully depleted silicon-on-insulator (FD-SOI) "increasingly is seen as not the way to go," Woo said. As the buried oxide is thinned in FD-SOI, the electron fields can penetrate and the advantages at the source and drain junctions are lost. Partially depleted SOI (now reaching respectable volumes in the microprocessor industry) will be effective through the 45-nm node. But Woo said he thinks that beyond the 45-nm node, companies will need to go to "completely new architectures, double-gate structures and vertical structures."

None of this will be easy. "At some point, you can't shut the (planar CMOS) devices off. It is a difficult scenario, but at some insertion point, we don't know where, these new architectures must be introduced," he said.