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Count on TCP offload engine
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GWENNAP_LINLEYAn emerging concept in networking silicon is the TCP offload engine (TOE). This type of chip handles many of the basic functions required to terminate a TCP connection, which are otherwise performed by a general-purpose CPU or NPU. No TOE chips have yet been announced, but several vendors are working on such devices.

The problem is that TCP termination, which involves reconstructing a stream of coherent data from many independent packets, is a compute-intensive task. It requires roughly 10 times as much performance as TCP routing, which consists of merely forwarding packets.

A 400-MHz MIPS CPU would consume all of its cycles trying to terminate a simple Fast Ethernet channel, leaving no cycles for other host processing. A 200-MHz IXP1200 has similar TCP performance.

Faster CPUs and NPUs will enter production over the next year, but none is likely to be able to terminate a Gigabit Ethernet channel. Even at Fast Ethernet or OC-12 speeds, these processors will spend many cycles on TCP termination instead of application code.

Who needs TOEs? Well, TCP termination is useful in many applications. TCP sits at Layer 4 in the OSI stack. Processing higher-layer protocols or applications requires first completing the TCP connection.

One hot application is IP storage. The SAN market is shifting from Fibre Channel to Ethernet and IP. The protocol of choice for IP storage is iSCSI, which sits at Layer 5, above TCP. Thus, any device that implements iSCSI must first decode the TCP data.

Another example is security, where the two key protocols are IPSec and SSL. While IPSec operates at Layer 3, SSL operates at Layer 5. Current security chips accelerate some SSL functions but don't handle the SSL protocol; creating an SSL protocol chip requires TCP termination.

A third opportunity is in Web switches and Web servers, where HTTP, a Layer 7 protocol, is the choice. Today, the HTTP connection is typically terminated on the Web server's CPU, which can be bogged down by one or two Fast Ethernet connections. As data centers migrate to Gigabit Ethernet, a better solution is needed.

Seeking to differentiate their products, OEMs are pushing more functions from servers into specialized boxes. Instead of creating a specialized chip for each application, these vendors can use TOEs to simplify their designs. Watch for some of these new chips to debut this year.

Founder and principal analyst of the Linley Group, Linley Gwennap is the coauthor of "A guide to network processors" (www.linleygroup.com/npu).





The views and opinions expressed in this column are strictly those of the author and should not be taken as an editorial position of EE Times or any of its other editors, publications or Web sites.


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