But the thing that characterized the hard-core specialty memory devices was nonstandard cells that were hard to design, big and power hungry. That discouraged their use in any but absolutely mission-critical applications. True dual-port SRAMs and content-addressable memories (CAMs) were good examples. Nobody got away with sticking a bank of CAMs into a design because they were fun to think about.

However, like everything else in the semiconductor landscape, that is changing. Specialty memory cells are still hard to design. But in advanced processes they are no longer necessarily slow, big or impractical.

The change probably started with the microprocessor folks. When superscalar design came into vogue, one of the problems it presented was that several execution units might want access to the register file on the same clock cycle. Forcing all but one of them to stall until the highest-priority unit had completed its access created unacceptable delays, not to mention plunging the whole CPU core into the depths of queuing theory. So the answer was to design a multiport register file. But in this case we weren't talking about dual-port: Some of these files needed lots of ports.

The next step came with the emergence of internetworking applications, where network addresses had to get translated on the fly. The obvious solution to single-cycle address translation is a lookup table. But if the table is sparsely populated, a CAM is far more efficient. So standard-product CAMs came back into the market, followed by intellectual property to create CAM blocks inside ASICs.

Today we see a proliferation of specialty memory-cell types for use by chip designers. Most system-level ASICs have a large number of memory instances, usually of several different types and including complex things like CAMs or multiports. But this is only the beginning.

As complexity, routing problems and power constraints force designers to think in terms of data flow rather than control flow, the idea of an intelligent memory-a memory device that performs functions beyond simply storage-becomes central to architecture. Cell designs get even more complex and logic, rather than clinging to the periphery of the cell array, vanishes inside.

That's a whole new world of architectural freedom.