This problem was exacerbated when oscilloscope manufacturers offered long acquisition memories behind each scope channel. The microprocessor inside the scope now had to process multiple megabytes of information before it could display each acquisition. As a result, waveform update rate and front-panel responsiveness slowed to a crawl. Despite the inherent user benefits of deep memory (that is, capture of long time records and increased waveform resolution), its use grew to be regarded as a special mode-applied only when absolutely necessary.

Manufacturers responded by offering special modes of operation that offered blazingly fast screen updates, much like the old analog oscilloscopes. Unfortunately, these worked only with very shallow acquisition memory lengths and when turned on, they often limited the feature set of the oscilloscope.

Agilent has tackled this problem by developing a deep-memory oscilloscope architecture that optimizes waveform fidelity without sacrificing waveform update rate. This deep-memory architecture includes a custom application-specific integrated circuit that offers two key capabilities. First, the ASIC offloads the scope's CPU from processing the waveform record for display. Instead of the CPU having to execute software to decide what portion of the waveform record will ultimately be sent to the display (for example, when zooming in on a particular area of interest), the ASIC is responsible for providing hardware acceleration of the reduction algorithms. This greatly increases scope throughput. Second, the ASIC maximizes the sample rate for each front-panel setting to obtain optimum waveform resolution.

Users get instant response when changing front-panel controls-even at the deepest memory settings. When running the scope on a repetitive basis-a frequent occurrence in the design debugging process-the waveform update rate is orders of magnitude faster than traditional deep-memory oscilloscopes. This greatly improves the chances of spotting anomalies that caused the design failure in the first place. And because the ASIC maximizes sample rates for each front-panel setting, users benefit from a more accurate representation of the signal being probed.

Users get the best of both worlds with this architecture. They're now able to turn on the deepest memory all of the time, and are no longer thwarted by sluggish scope operation during the debug process.

Tim Coll is Oscilloscope Program Manager for the Design Validation Unit at Agilent Technologies (Palo Alto, Calif.).