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C-ing future of H/W design
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BIER_JEFFAt one time, most DSP applications were powered either by instruction-set processors or by application-specific fixed-function chips. There was a clear distinction between those two types of solutions and clear differences in the associated design methodologies: Processors required software development, while ASICs required hardware design. Today, the line between hardware and software has been blurred, particularly with flexible architectures that combine instruction-set processors with custom, customizable or reconfigurable logic.

One key advantage of such flexible architectures is the ability to move work loads between the predefined processor and specialized logic incrementally. However, doing so can be made difficult by the differences between the software and hardware design languages.

One way to reduce the burden of application development for this kind of a flexible architecture is to design the software and the hardware with similar languages. Given its popularity, C is an obvious candidate for a common design language; companies like Adelante and Celoxica offer tools that allow implementation from C-like code into custom logic. This approach seems to be gaining momentum: in November, Celoxica announced agreements with both Altera and Xilinx to adapt its C-based language for use on next-generation FPGAs from these two companies.

Though the idea of a unified design language is tantalizing, C may not be up to the challenge. Because C lacks support for many fundamental DSP concepts, it is difficult for compilers to generate efficient DSP code from C. In addition, a "C-based" hardware design language may in fact bear only superficial resemblance to C; hence, moving application tasks between the instruction-set processor and the specialized hardware may require much more effort than simply using a different compiler.

Of course, the potential benefits and drawbacks of more-uniform design methodologies are not limited to customizable or reconfigurable processors. DSP applications increasingly depend on heterogeneous architectures such as a combination of a general-purpose processor and a DSP processor. Those who are able to adapt their design methodologies to make effective use of such heterogeneous designs will have a significant advantage in fielding competitive products.

Jeff Bier is the General Manager of Berkeley Design Technology Inc. (www.bdti.com), a DSP Technology Analysis and Software development company. Kenton Williston of BDTI contributed to this column.





The views and opinions expressed in this column are strictly those of the author and should not be taken as an editorial position of EE Times or any of its other editors, publications or Web sites.


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