Library developers have done their best to hide bizarrely complex design rules and growing process uncertainties from library users. And tool developers have struggled with timing models, physical-synthesis techniques, buffer insertion and anything else they can find to make interconnect timing behave well.

But all that is starting to shred under the stress of new processes and increasing process variations. At the cell level, the basic polygon arrangement is becoming layout-dependent. It is becoming increasingly difficult to design cells in such a way that the optical-proximity-correction figures and phase-shift plates inserted into the masks are guaranteed not to interfere with the figures from adjacent cells.

In fact, the effects of these figures are layout-dependent: An object in an isolated region of a mask will print differently than an object in the middle of a dense array of similar objects. At an electrical level, capacitive and inductive coupling and even the supply voltage on a cell are also layout-dependent, and the variations cannot be ignored.

The probability of a via actually forming, or of a short metal segment being intact, depends on what else is on the mask nearby. Designers are using redundant vias, and in some cases redundant wires, without really knowing what the physical interconnect structure will be from one die to another.

Library designers can guardband away these problems, of course. But to do so could reduce the performance of an advanced process so much that resulting designs might be no faster than in an earlier process, despite the greater latent speed.

Such problems are no longer confined to library design. Via variability, dishing effects in which long metal runs are accidentally excavated by polishing steps, inductance effects, power supply transients and substrate coupling are all layout-dependent issues that can have a major impact on the performance of a circuit. In placement and routing as well as in cell design, sufficient guardbanding to make the task safe for naive tools would deprive the designers of performance and density. It is a dilemma.