For example, Motorola wants to introduce a high-k gate material into its HIP9 (65-nanometer node) process, moving into production in three or four years. Motorola's motivation is different from that of Intel, which also hopes to bring on a high-k insulator at the 65-nm node. Motorola is most concerned about controlling leakage in low-power applications-that is, cell phone handsets-said Joe Mogab, a Motorola technologist. After power comes worries about reliability in high-performance parts, Intel's main concern.

Motorola, Intel and Texas Instruments believe that oxynitride will suffice for only a few more years, and then a huge switch must be made. TI recently announced its plan to use a hafnium silicate gate insulator for its high-performance 65-nm process (see June 17, page 20).

Interestingly, IBM is being most cautious about the timing of its high-k introduction. Bijan Davari, IBM's top process technologist, doubts that a high-k material will be ready by the 65-nm node. While the search for a high-k insulator is somewhat independent of IBM's effort to develop strained silicon channels, Davari believes things may work out so that strained silicon can be introduced at the 65-nm node, before the switch away from silicon dioxide.

Strained silicon, which speeds up carrier mobility by putting a very thin active layer of silicon on top of a thicker layer of silicon germanium, is another tough choice. Texas Instruments vice president Dennis Buss said he believes strained silicon will prove to be less difficult than some of his colleagues at TI believe. Intel has fabbed strained silicon test circuits at its research fab in Oregon but remains dubious that the extra material costs and process complexity will result in a commensurate boost in performance.

Before us is a David vs. Goliath story in silicon-on-insulator. AMD is betting the success of its Hammer processor on SOI, while Intel sticks with bulk silicon for 90 nm and beyond. With an SOI wafer costing several hundred dollars more than a bulk wafer, AMD's profits may ride on SOI's giving it megahertz parity with Intel.

The switch to high-k insulators, metal electrodes, SOI, strained silicon and vertical gate structures will happen. But when?

Craig Lage, a Motorola technology planner, put it best: "We'd like to introduce these changes one generation at a time. But we may not be able to."

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