Recently, Nick Flaherty wrote an article about the decline of new ASIC designs (see July 1, page 38) due to the high cost of deep-submicron technologies (0.13 micron and 90 nanometers). Richard Goering's column on "Decline in chip design?" (Tool Talk, July 8, page 44) pointed to the increase in embedded systems, suggesting that software-based solutions may one day replace systems-on-chip. Both writers are correct. Deep-submicron design is very expensive and few ASICs can justify a $5 million NRE investment. From such reports, it would seem that Moore's Law is not, in fact, affordable.

But they overlook the depth of potential remaining in the technology we have. With that potential in mind we can see that complex chip design still has a long way to go. Moore's Law and the amazing rate at which the industry moved from 1.2- to 0.18-micron design rules have provided nearly unlimited horsepower to IC design engineers. Making new designs faster, smaller and better could be achieved just by moving down to the latest process. The NRE costs were reasonable and the payback periods short.

At one time Lotus 1-2-3 was an elegant program that fit easily on a single floppy disk. Today Excel 8.0e occupies more than 5 Mbytes on my computer. No one cares because disk storage and computing power are cheap and plentiful. But the legendary software skills of the engineers from the former Soviet Union were due in large part to the poor capacities of their computers. Without the convenience of computing horsepower that Western engineers had at their disposal, Russian engineers were forced to write very concise, clean and elegant code.

Similarly, many IC designs implemented in 0.25 micron could well have been done in 0.35 if the design teams had really engineered their products. The high cost of IC design and production at 0.13 micron and below, combined with the increasing content of intellectual property, is forcing chip designers to be what they were trained to be: engineers. Engineers take what exists and then refine and improve upon it. They turn rough prototypes into elegantly engineered solutions.

Is the current cost of 0.13 micron and 90 nm high? Of course it is. Is it stopping companies from migrating to new technologies? Undoubtedly. Does that spell the end of SoC and ASIC chip design? Absolutely not. It's what they do. They're engineers.

John Ford is Vice President of Marketing at Virtual Silicon Technology (Sunnyvale, Calif.).