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Designers' sad world
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EE Times


BIER_JEFFStroll the halls of any computer engineering graduate school and you will encounter numerous students brimming with ideas for cranking up processor speeds. Until recently, graduates of those schools found a warm welcome in the PC-processor market, which seemed to have an insatiable need for speed. Today, however, fewer PC buyers are willing to pay a premium for more speed — after all, who needs a 3-GHz processor to write a letter to grandma? If the PC market no longer needs ever-faster processors, perhaps these computer engineering students should have majored in art history.

In reality, computer architecture grad students need not worry. While the lust for ever-faster PC processors may be waning, communications applications still have a nigh-limitless demand for computational horsepower. Communications applications are constrained by inherently limited resources, which creates economic incentives to use those resources efficiently. For example, radio spectrum is limited, so squeezing twice as many users onto the same spectrum is invaluable. Fortunately for the up-and-coming processor architect, that need for efficiency translates directly into a need for processing power. For example, more-efficient radio spectrum use can be achieved via more-sophisticated — and hence computationally intensive — modulation, coding and compression techniques.

Alas, the signal-processing work at the heart of communications has little in common with typical PC applications. As a result, the standard bag of tricks used to speed up PCs — deep pipelines, complicated branch prediction schemes and the like — are not appropriate in communications. Worse, communications applications demand enormous processing power on shoestring budgets. While PC processors command multihundred-dollar prices, communications applications typically impose low-double-digit budgets on the processor. And while PC processors often consume dozens of watts of power, most communications processors are stuck with power budgets of a mere fraction of a watt.

The good news for processor designers is that much challenging work remains. The bad news is that the new challenges are quite different from the old. At least processor designers don't have to fall back on that interest in art history.

Jeff Bier is the general manager of Berkeley Design Technology Inc. (www.bdti.com), a DSP technology analysis and software development company. Kenton Williston of BDTI contributed to this column.





The views and opinions expressed in this column are strictly those of the author and should not be taken as an editorial position of EE Times or any of its other editors, publications or Web sites.


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