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WILSON_RONThe globalization of system manufacturing in the electronics industry has been full of unintended consequences. One of the most interesting is the indirect effect that globalization of consumer electronics is having on the design of I/O structures for ICs.

During the 1990s there was a technology vector in IC packaging very much like the Moore's Law vector: up and to the right. As chip densities increased, Rent's Rule correctly predicted that pin counts would increase as well.

That the frequencies on these pins would also go up was so obvious that no one was able to put his name on that observation. So with increasing transistor density, packaging technology grew more sophisticated: more leads, finer pitches and, belatedly in many cases, more attention to signal integrity and heat dissipation.

But the globalization of the industry is turning that trend on its head in a fascinating way. As assembly shops in the developing world spring up to grab a share of low-cost markets, they are coming online with less than the latest board fabrication and assembly technology-a lot less, in fact. To take the Chinese television receiver business as an example, a lot of the boards done in this region are single-sided, on the least expensive materials, with nondrilled through-hole connections.

But the chips that are going onto-or rather, into-these boards are another matter. To hit the price point and feature set that the global TV market demands, the set vendors are using the latest, most highly integrated ICs they can get-and wave soldering (hand soldering, in some cases, probably) those chips into what could only be called primitive boards.

That's a nice irony, but it has a major implication for chip designers. If a chip is headed for this market, it will be necessary to understand on the front end what kind of board fab capability the OEM will have, and what kind of packages it will require. A very inexpensive wire-bonded package with a through-hole lead frame may be absolutely essential. And that means the I/O cells will have to be designed-and verified-with the models for this sort of package. That, in turn, may mean radical redesign of drivers, conservative signaling and maybe architectural changes to accommodate the environment in which the chip will actually work.

Ron Wilson covers microprocessors, programmable/reconfigurable logic and the chip design process. He can be reached at rwilson@cmp.com.





The views and opinions expressed in this column are strictly those of the author and should not be taken as an editorial position of EE Times or any of its other editors, publications or Web sites.


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