After a Sony presentation on a single-chip GPS receiver chip at the 2003 Symposium on VLSI Circuits in Kyoto, Japan, about a dozen Japanese design engineers crowded around Takahide Kadoyama, peppering him with questions about how the Sony team had isolated the radio portion of the design from noise emanating from the digital portion.

Using 0.18-micron CMOS, the Sony creation consumes only 57 mW, and the die size is tiny-only 6.4 millimeters on a side. The first single-chip GPS solution, it will be interesting to see the products that come from Sony's integration feat.

It is just the latest example of how circuit designers are learning to use low-cost CMOS for Bluetooth, global positioning and cellphone designs. Indeed, in Austin, Silicon Laboratories is riding high with "Aero," the first transceiver to use CMOS for GSM handsets.

"Software-defined radios are one of the toughest designs to crack. The design has to be perfect. There is almost no room for error," Abidi said.

The payoff is huge, and the advent of multi-mode phones has made the shift to CMOS more advantageous. Rather than incorporate three separate SAW filters for three bandwidths, a shift to digital sampling at the front end of the radio can cut costs a lot, Abidi said.

"Eventually, the customer decides. China is a huge new market, and the cost of BiCMOS will result in CMOS' overtaking BiCMOS in these cost-competitive markets. A handful of people have figured out how to do it in CMOS, and the rest will have to follow. The old-school companies . . . will get killed."

CDMA circuits will be more amenable to CMOS than the earlier TDMA and GSM standards, he said. "CDMA is a lot easier (for CMOS) on the radio side, but requires a lot more from the DSP," he noted. As CMOS moves to higher clock speeds supporting faster sampling, DSP-centric solutions will become more attractive, he said.

David Lammers covers SoC process equipment. Contact him at dlammers@cmp.com.

http://www.eet.com