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Security processor targets IP storage networks
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Mountain View, CA — Offering the latest security algorithms, the Nitrox PX family of security processors from Cavium Networks Inc. lets designers craft systems with symmetric encryption performance that scales from 500 Mbits/s to 2.5 Gbits/s and asymmetric performance from 4000 to 17,000 RSA operations per second. The PX family incorporates the new and essential security algorithms by adding hardware acceleration for SHA-2, AES-GCM, and Kasumi. The PX family is also software compatible with the company's Nitrox family of security processors, and offer either a PCI-X 64-bit/133 MHz interface or a PCI-Express 4-lane interface.

To handle the more complex algorithms, the PX processors incorporate the company's Gigacipher V2 enginea second-generation implementation of Cavium's dedicated protocol processor said Rajiv Khemani, the vice president of marketing at Cavium. The engines incorporate larger firmware code storage areas and enhanced hardware queuing to pertmit the new PX family to enable richer protocol processing and multiprotocol performance stated Khemani. The chips can perform full packet/protocol processing, including the company's patented macro-processing for SSL handshake acceleration. Additionally, the chips can perform simultaneous multi-protocol processing and can support dynamic adaptability and bandwidth allocation.

For companies currently using the Nitrox Lite processors with the PCI-X interface, they can directly upgrade to the PX family of pin-compatible processors without a board redesign. The PCI-Express versions are targeted at new system designs that can leverage the simpler PCI-Express interface.

The SHA-2 algorithms incorporate key lengths of 256, 384, and 512 bits for more robust security protection vs the previous-generation SHA-1 algorithms. The U.S. National Institute of Standards and Technology (NIST) is encouraging the industry to rapidly adopt the SHA-2 algorithms. Also, AES-GCM (AES-Gallois-counter-mode) is expected to replace existing 3DES and AES-CTR encryption algorithms currently used for IPsec VPN applications. Finally, the Kasumi algorithms are targeted at next-generation mobile networks (CDMA and GSM) to provide confidentiality, integrity, and encryption as mandated by the International Mobile Telecommunications (IMT-2000) standard.

The PX family consists of eight chips, four with PCI-X interfaces (CN15xx) and four with PCI-Express interfaces (CN16xx). In each sub family, the four processors are pin-compatible and scale in throughput performance from 500 Mbits/s to 2.5 Gbits/s. The PX chips are housed in 256-contact BGA packages and consume less than 3 W. In 1000-unit lots, chip prices range from $49 to $139 apiece. Samples of the chips and associated accelerator cards (PX-XL16xx and PX-XL15xx) with Linux and Windows system drivers will be available in the fourth quarter of this year.

Cavium Networks (650) 623-7033

www.caviumnetworks.com.

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The views and opinions expressed in this column are strictly those of the author and should not be taken as an editorial position of EE Times or any of its other editors, publications or Web sites.


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