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Profile for Dave Callaghan
Dave Callaghan
Member Since: November 29, 2012
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Posts: 74

I would say my defining activity at the moment is my Master's research project. "Development of a Two Element Correlating Radio Telescope Interferometer" The core of the work is digital correlation on FPGA but also involves interface to a PC via a PIC microcontroller to give some FPGA configuration control and also to extract the data from the FPGA correlator. The project also involves an RF front end where two TDA18272 silicon tuners from NXP are used to down convert from UHF to an IF centre frequency of 5 MHz. The PIC controls these devices too, setting the RF frequency as well as IF centre frequency and bandwidth. The platform for the entire system is Ettus Research USRP2 (Universal Software Defined Radio Peripheral) with Xilinx Spartan 3 FPGA and Linear Technology LTC2284 dual 14 bit 100 Msamples/s ADC that samples the IF signal from the silicon tuners. All is working well so far so I hope to be finalizing the Master's soon.


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As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.

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