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BrianBailey
Member Since: November 26, 2012
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posted in November 2012

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What were they thinking: Newspapers want a cut of Google’s pie
The Engineering Life - Around the Web  
11/30/2012   6 comments
Greed is at work everywhere and when someone is successful, everyone wants to freeload. That is what is going on with publishers in Europe…
Part V: Case Study: Highlighting a Successful Design Example
EE Times University  
11/30/2012   123 comments
Putting it all together is where the rubber meets the road in any embedded effort. We'll delve into a successful design project, which showcases how engineers at an energy company put to practical use the intelligent concepts discussed in this course to create a noteworthy application.
Part IV: Apps Development Utilizing the Partner Ecosystem of Intelligent Solution
EE Times University  
11/29/2012   138 comments
To help engineers ensure that end-user specs and constraints are factored into the design equation -- with the output being a reliable, cost-effective end product -- we'll examine the rich ecosystem of boards, operating systems, security solutions, and tools available for building your intelligent app.
Cadence donates multi-patterned lithography technology
Blog  
11/28/2012   1 comment
Cadence Design Systems has donated extensions to the Open Access community which enable physical design tools to represent Multi-Patterned Technology.
EDA/IP weekly roundup – November 28th
Blog  
11/28/2012   Post a comment
Accellera, ASSET, Atrenta, Cadence, EDALab, eSilicon and IAR made the lineup today. See here for their news…
Part III: Rethinking Embedding Processing: The Bridge to Ivy Bridge
EE Times University  
11/28/2012   211 comments
Traditional embedded solutions have drawn from a disparate range of CPU solutions. Emerging, next-gen intelligent apps by definition require a minimum of 32-bits for optimum functionality. We'll dive into the architecture and features of one such family, the third-generation Intel Core vPro Processors, which include multiple x86-64 cores and embedded security.
Blogs and use of new media
Blog  
11/28/2012   Post a comment
Do you have a blog and are you happy with the number of hits that it gets? If not consider moving your blog to the EDA Designline...
Mentor Insights
Blog  
11/28/2012   Post a comment
This is a consolidated listing of all of the blogs written by Mentor Graphics, that have appeared in the EDA Designline.
Executive interview: Ghislain Kaiser, CEO Docea Power
Blog  
11/27/2012   Post a comment
In this interview with Ghislain Kaiser, co-founder and CEO of Docea power, we talk about the finding of a need and the ways to go about satisfying that need, including some problems along the way…
Part II: Four Pillars of Intelligent Industrial Apps: Security, Manageability, Connectivity & Performance
EE Times University  
11/27/2012   265 comments
This lecture will give engineers' perspective about crossing the bridge from the traditional embedded perspective to intelligent applications, which are more adaptive and responsive to user needs throughout their lifecycle. We'll define the four pillars of these apps in the context of both engineering requirements and customer benefits.
Introduction: Understanding the Connected Factory of the Future & Next-Gen Industrial Apps
EE Times University  
11/26/2012   227 comments
In this class, you'll learn how the flexible, digital factory of the future will dominate the industrial arena, what its components are, and how embedded apps are evolving to serve this new environment.
EDA/IP weekly roundup – November 21st
Blog  
11/21/2012   Post a comment
Advantest, Agilent, ARM, element14, IC Insights, Mentor, Sonics and UMC made the lineup today. See here for their news…
Synopsys rolls out upgrade to HAPS
Blog  
11/20/2012   1 comment
HAPS is going back to its roots with a more modular architecture and takes advantage of some new features in the Virtex 7 architecture giving more capacity and performance…
EE Times University: Intel's intelligent systems explained
Blog  
11/16/2012   Post a comment
Cloud computing has been getting a lot of attention, but it is just a small piece of a bigger trend – the Internet of Things and a new generation of embedded systems. Find out all about it in a series of upcoming webinars…
What were they thinking: more patent abuse
Blog  
11/16/2012   19 comments
I don’t know about you, but I am getting tired of the way that our industry is abusing the patent systems and as a result costing tax payers a huge amount of money...
Why do I need an RTL to GDS flow?
Blog  
11/15/2012   Post a comment
Flows are a fact of life. You can’t get away with them, but what does a modern flow look like and how could it help your process? Read on…
EDA Designline blogs and blog roll
Blog  
11/14/2012   Post a comment
This is a pointer to past EDA Designline commentaries and blogs contained within it.
Collaborative Advantage
Blog  
11/14/2012   Post a comment
This is a listing of all blogs published under the name of Collaborative Advantage
EDA/IP weekly roundup – November 14th
Blog  
11/14/2012   Post a comment
Altera, ANSYS, Atrenta, Berkeley, Everspin, Freescale, Imperas, Mentor, Synopsys, X-FAB and Xilinx made the lineup today. See here for their news…
IP integration is hard
Blog  
11/14/2012   2 comments
“Integrating IP is hard” explains Atrenta’s Manoj Bhatnagar. That is why TSMC asked for our assistance in creating a set of rules for their IP qualification program…
Synopsys announces new generation of STAR Memory System
Product News  
11/13/2012   Post a comment
New geometries create different issues and new architectures are often required to address them. Synopsys has done a significant revamp on its STAR memory system to address 20nm and below…
What were they thinking: Christmas in October
Blog  
11/9/2012   8 comments
I was dismayed the other day when I went into a department store and they were playing Christmas music. It almost made me want to leave the store...
Myths, hype and the building blocks of SoCs
Blog  
11/8/2012   1 comment
How much of a typical chip is based on IP reuse? As a percentage, is it going up or down? Here are some figures that may surprise you.
EDA/IP weekly roundup – November 7th
Blog  
11/7/2012   Post a comment
Agilent, Aldec, Altera, Atrenta, Databeans, GSA, JEDEC, Macnica, Mentor, Novarm, Silicon Labs, Synopsys, Weightless and X-FAB made the lineup today. See here for their news…
Comment: re: Crazy acquisition chatter - 11/6/2012
Crazy acquisition chatter
Blog  
11/5/2012   6 comments
The levels of chatter surrounding rumored acquisitions is picking up, and financial pundits have some crazy ideas.
What were they thinking: Motorized ice cream cone
Blog  
11/2/2012   6 comments
Back to the weird and wacky patents and with this one the inventor clearly needs a few additional ideas. Can you help?
Changing the political system
Blog  
11/1/2012   13 comments
If you were in charge of elections, what changes would you make?
Chip group says business model must evolve
Blog  
11/1/2012   6 comments
With venture capital scarce, the Global Semiconductor Alliance says chip companies must come up with new business models in order to thrive.


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