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BrianBailey
Member Since: November 26, 2012
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posted in July 2013

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EDA/IP Weekly Roundup – July 31, 2013
Blog  
7/31/2013   2 comments
This is a roundup of news and activities associated with EDA and IP that broke over the past week.
Comment: Re: Feed me - BrianBailey - 7/31/2013
Is Moore's Law Dead? Does It Matter?
Blog  
7/31/2013   57 comments
Does US national security depend on the continuance of Moore's Law, or is innovation that addresses the realities of the technology business opportunity more important to progress and wealth creation?
Comment: Re: Feed me - BrianBailey - 7/30/2013
Comment: Re: Feed me - BrianBailey - 7/30/2013
Comment: Re: Feed me - BrianBailey - 7/30/2013
Comment: Re: - BrianBailey - 7/30/2013
Ethics in the Workplace
Blog  
7/29/2013   64 comments
Sometimes work can throw you an ethical challenge, and the right and wrong of it are not always black and white. That's when you have to step back and do some non-engineering thinking.
The Love Triangle: Do EDA Services, Tools & IP Mix?
Blog  
7/26/2013   1 comment
Services, tools, and IP licensing represent the three most common business models in EDA. Most companies get drawn into offering a mix of all three, but is that a good thing?
Comment: Re: Update - BrianBailey - 7/25/2013
EDA/IP Weekly Roundup – July 25, 2013
Blog  
7/25/2013   3 comments
This is a roundup of news and activities associated with EDA and IP over the past week.
If Burning Man Came to EDA
Blog  
7/23/2013   8 comments
If you could change something about the EDA or semiconductor industries, what would it be and how would it make things better? How would you incorporate aspects of the Burning Man ethos into high technology?
IP Software Integration Left Out in the Cold
Blog  
7/19/2013   6 comments
A roundtable of EDA experts passes comment on the impact of the increasing amounts of software that comes with IP cores in modern SoC design and that needs to be integrated.
EDA/IP Weekly Roundup – July 18, 2013
Blog  
7/18/2013   Post a comment
A condensed roundup of news and activities associated with EDA and IP over the past week.
Comment: Reply to test - BrianBailey - 7/17/2013
Tanner's Growth Is Enabled by Standards
Blog  
7/17/2013   4 comments
Tanner has long been the smaller, independent EDA company, but that has served the company well, and the increased number of standards in EDA is helping the company grow.
Comment: Re: Help - BrianBailey - 7/11/2013
Comment: Re: Help - BrianBailey - 7/11/2013
Protecting Against IP Theft
Blog  
7/11/2013   4 comments
Providers of semiconductor intellectual property reveal philosophies on protecting the secret sauce.
EDA/IP Weekly Roundup – July 10, 2013
Blog  
7/10/2013   Post a comment
Brian Bailey's weekly roundup of news and activities associated with EDA and IP.
Power Intent & Constrained Random Not Mixing Well
Blog  
7/10/2013   Post a comment
System-level constrained random will be with us in the future, but it will look very different from the constrained random of today.
Atrenta's Ajoy Bose on Mentoring
Blog  
7/9/2013   Post a comment
The fourth and final part of Brian Bailey's interview with Ajoy Bose, CEO of Atrenta, focuses on the role mentors have played in his career.
Asset & Arium Attack SoC Visibility
Blog  
7/9/2013   3 comments
Asset InterTech plans to acquire Arium to improve SoC testing.
Need Help Writing Timing Constraints?
Blog  
7/9/2013   5 comments
Timing constraints are well explained in this tool-agnostic book on Synopsys Design Constraints.
Experts Discuss Who Verifies IP Cores
Blog  
7/8/2013   1 comment
Questions have circled around IP core verification for years. EE Times went to some experts and got some up-to-date guidelines and opinions.
Complex Chips Make Tangled Business
Blog  
7/3/2013   5 comments
As chip complexity has increased, design has climbed in abstraction, and it has created a Byzantine network of business models and opportunities. But are too many entities trying to take profit across the design process killing the goose that lays the golden IC?
Comment: Re: Tools - BrianBailey - 7/2/2013
Processors Everywhere, but Tools Lacking
Blog  
7/2/2013   4 comments
A research study shows the majority of IC designs are now for multiprocessor chips. But are the EDA and design verification sectors keeping up with the SoC multiprocessing revolution?


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