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BrianBailey
Member Since: November 26, 2012
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posted in September 2011

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Comment: re: Models, models, models… - 9/29/2011
Models, models, models…
Blog  
9/29/2011   3 comments
Without models the EDA industry could not exist and when it comes to trying to promote a new abstraction level, models become the sticking point. Synopsys intends to change that…
Synopsys' CODE V Enhances Analysis of Precision Optical Systems
Product News  
9/28/2011   Post a comment
Synopsys has a new version of its CODE V® optical design and analysis software ready for you with enhancements to its Beam Synthesis Propagation tool…
EDA/IP Roundup
Blog  
9/27/2011   Post a comment
There are often many news items that are not worth writing a full blog about, but may still be of interest to people. This is a roundup of those items…
10X productivity boost is nothing to be sneezed at
Blog  
9/27/2011   Post a comment
Press releases that claim productivity improvement are a dime a dozen, but this one caught my eye and maybe there is something to it…
PCB design and supply chain standards group gains momentum
Blog  
9/27/2011   Post a comment
IPC-2581 is a generic standard for printed circuit board assembly products' manufacturing description data and transfer methodology…
Cadence releases additions to their Verification IP library
Product News  
9/26/2011   Post a comment
Cadence has just released a bunch of new Verification IP (VIP) for various memories and protocols that they hope will allow their customers to be first to market…
Travel Nightmares: Cutting it fine
Engineering Pop Culture!  
9/26/2011   3 comments
Traveling can always mean problems and in our continuing series about travel nightmares, David Ashton recounts one of his problematic journeys...
opinion: Unethical companies make us “opt out”
Blog  
9/26/2011   6 comments
Opinion: Corporations seem to believe that the option to opt out is good enough to protect our privacy, but I disagree. Those options are usually buried in a pile of fine print…
Comment: re: A game worth playing - 9/23/2011
Arasan Chip Systems Introduces USB 2.0 HSIC PHY IP
Product News  
9/23/2011   Post a comment
Reuse at all levels is wonderful, especially when a standard can be repurposed for a different application. Arasan produces USB 2.0 HSIC PHY IP for on board interconnect…
Relativity, causality and headaches
Engineering Pop Culture!  
9/23/2011   5 comments
Italian scientists say neutrinos can travel faster than light. If this is proven to be true what does it say about relativity and causality…
Cypress release PSoC Creator 2.0
Product News  
9/22/2011   2 comments
Cypress’ PSoC Creator merges IP and tool and now hardware and software into a true ESL design creation and implementation tool – direct to silicon…
Si2 announces agenda and speakers for 16th Si2 conference
Blog  
9/22/2011   Post a comment
The Silicon Integration Initiative (Si2) has announced that its 16th Si2 Conference will be held on October 20, 2011, at the Network Meeting Center-Techmart, Santa Clara…
Comment: re: A game worth playing - 9/21/2011
EDA Roundup
Blog  
9/21/2011   Post a comment
There are many news stories out every week that are interesting, but on their own don't warrant a full writeup. This is a roundup of such information...
A game worth playing
The Engineering Life - Around the Web  
9/21/2011   8 comments
Most games are played for pure enjoyment, or to lose yourself in a mindless morass on the floor, but there can be a serious side to games...
CoFluent helps Intel with virtual platform creation
Blog  
9/20/2011   4 comments
A quiet acquisition puts Intel back in the EDA business for virtual platforms. I am sure they don’t see it as a way to make money, but to sell hardware…
NextOp adds a logo for assertion synthesis
Blog  
9/20/2011   Post a comment
Normally I would not comment on a product being sold to a company, but I do take more notice when a) it is a startup company that is creating a new field and b) when the company…
DFI helps speed up the memory sub-system
Blog  
9/19/2011   Post a comment
A revision to the DFI standard promises faster memory access and support for DDR4 memory sub-systems. Cadence also announced availability of supporting IP.
Travel nightmares: no room at the inn
Engineering Pop Culture!  
9/19/2011   6 comments
I know many people in the EDA industry and one thing they have in common is that they do travel – a lot. Everyone has a story to tell...
Poised on the brink of a new era…
Blog  
9/19/2011   3 comments
The EDA DesignLine is in new hands! As of today, I am the new editor and I intend to return this corner of the EE Times universe it to be the vibrant community it should be…
Amr Mohsen – A story so bizarre…
Programmable Logic DesignLine Blog  
9/6/2011   17 comments
I thought it may be worth while reminding those who did not witness this tale the first time around or who had forgotten just how crazy our industry can be.


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