"We're trying to codify the key steps in the development and deployment of a programmable platform," said Kurt Keutzer, professor of electrical engineering and computer science at U.C. Berkeley. "We're starting with developing a discipline around key benchmarks for an application." To this end, the Mescal project has developed an approach to benchmarks for network processors, and has developed a taxonomy of the architectures of network processors.

To supply a programmer's model
Beyond that, said Keutzer, the project will define a discipline for describing the design space to be explored, and for exploring and evaluating the design space. It will then supply a programmer's model. The final challenge is the actual mapping of an application onto a programmable platform.

The Mescal team is using the Liberty tool set from Princeton to help complete this work. Liberty includes a compiler, timing simulator and functional simulator. The Mescal team is also conducting an experiment with Infineon that uses the Teepee software for architectural description and simulation. Teepee comes from the U.C. Berkeley Ptolemy project.

"There are no formalisms for how to develop architectures," Keutzer said. "One thing Teepee aims to do is to create a mathematical formalism for capturing a programmable platform architecture." GSRC research is further described at www.gigascale.org.