IEEE 802.3, a 10GBASE-T Ethernet standard ratified in June 2006 following four years of development, is considered a mature and worthy successor to the 100BASE-T and 1000BASE-T standards, which were ratified in 1995 and 1999, respectively. The marketplace is ready for a speed upshift from the network: commodity servers have ample CPU horsepower and IO-plane performance, and many applications are pushing the bandwidth requirements for both servers and the core data-centre network.

However, the increased signal-processing requirements imposed by the 10GBASE-T channel mean that an early-generation 10GBASE-T Physical Transceiver (PHY) consumes significantly more power than a mature 1000BASE-T transceiver or conventional coax- or fiber-optic-based transceivers. Switch products face a relatively simple set of design tradeoffs as power improvements on 10GBASE-T transceivers drive denser 10Gbps switches. Designers need to ensure that footprint, power and cooling requirements for the PHY silicon are met for their various legacy and upcoming platform designs.

Clearly, lower power and higher levels of integration will drive port density and cost over time. Similar to 1000BASE-T transceivers before, when first-generation transceivers began at nearly 12 times the power consumption of the current generation, 10GBASE-T devices, once adopted, will benefit from both architectural refinements and advancements in silicon process geometry. Yet, even with the first generation of PHYs, switch densities of up to 24 ports per rack unit are expected in 2007, combining a new density point for 10Gbps Ethernet switches with unparalleled ease-of-use.

Like switches, network adapter products also face the signal-processing requirements of 10GBASE-T; in addition, they are required to handle the digital Ethernet frames from the PHY at higher bitrates, presenting this data efficiently to the server's IO-plane for eventual application processing via the operating system. However, while cooling and footprint are the significant issues in high density switches, competition for the network adaptor power budget is the limiting factor at the server end.

There is no question that the 10GBASE-T PHY uses a more significant fraction of the total power budget available than was the case for the previous generation of coax- or fiber-optic-based network adaptors. However, by reexamining the power budget relative to the network adapter architectures, fully-compliant 10GBASE-T products can fit industry standard power envelopes (such as the PCIe add-in card design rules).

As 1000BASE-T did before with 100BASE-T, the signal processing challenges for 10GBASE-T operation have introduced significant complexity over the prior generation of copper PHYs. In particular, a 10GBASE-T PHY must cancel out signal echo over at least 100m of cable, as well as cancel Far End Cross Talk (FEXT) and Near End Cross Talk (NEXT) from other twisted pairs within the same cable, in addition to conducting high-performance equalization designed to remove the Inter-Symbol Interference (ISI) introduced by the channel.

At the inception of the IEEE standards definition process, many doubted that 10GBASE-T requirements could be met at all, and those who did predicted power in excess of 25W transceivers required to meet those requirements. In response, the standard has introduced a new line code that enables near-optimal 800Mbaud signaling to be achieved, together with improved Forward Error Correction (FEC) coding to improve the baseline margin. The resulting transceivers need to use state-of-the-art, high-performance analog-to-digital converters and high-speed error correcting decoders, as well as TeraOps of signal processing, to cancel the impairments of the cable. The challenges facing silicon implementations were daunting, for some vendors claimed that implementation of a 10GBASE-T PHY in 90-nm silicon would consume over 25W by 2008.

It is no mean achievement that first-generation products were sampled within three months of the standard's ratification and have been brought to market requiring less than half these vendors' power estimates.

Already there are strong indications that the 10GBASE-T PHY roadmap is likely to parallel the 1000BASE-T experience. The first 1000BASE-T PHYs sampled about six months after IEEE standard ratification to OEM customers at around 7.5W; second generation parts were used in high-volume products consuming less than 5W and today most 1000BASE-T switches contain octal PHYs consuming about 0.5W per port. Thermal constraints were perhaps not as critical as for today's high-density rack-and-blade server infra-structures.

However, there are anecdotes of 1Gb/s product demonstrations so hot that the servers required innovative methods to prevent shutdown caused by overheating. Just as in 1000BASE-T, it is unlikely that 10GBASE-T applications will wait for the reductions in power that future generations offer; rather, the opportunity belongs to those able to make use of the early generations by mating 10GBASE-T PHYs with efficient adaptor card architectures.

In contrast to the fairly hard physical impairments faced by the PHY architects, network adaptor architects have much greater flexibility. They are faced with a myriad of offload features to choose from, and even these features are optionally supported by the different operating systems.

Each feature has a corresponding price/performance/power/time-to-market tradeoff that must be carefully considered. The first 10Gb/s Ethernet controllers were developed in anticipation of deployment into severely bandwidth-challenged servers and so incorporated complex, power-hungry offload features. To accommodate the power envelope of add-in cards, the later copper coax and fiber-optic PHYs were forced to fit into a small fraction of the power budget in response to the amount of power required by these offload engines. Today, although the performance benefits of network adaptor features such as TCP Offload Engine (TOE) and TCP Segmentation Offload (TSO) remain under debate, the power budget allocated to these features still dominates more customer-affecting functions such as the power required for robust 10GBASE-T signal processing.