United Business Media EE Times


Search

HOMEMARKET INTELLIGENCE UNITFORUMSDESIGNNEW PRODUCTSCAREERSBLOGSCONTACTEVENTSSIGN UP!RSSMost Popular contentTrusted Sources

 

Low-power FPGAs eye DSP apps
Print this article Email this article Reprints RSS Digital Edition

EE Times


San Jose, Calif. -- As FPGA vendors continue to push field-programmable gate arrays into the digital signal processor space, Altera Corp. is rolling low-cost FPGAs that it says are the industry's first to be fabricated in a low-power process. The Cyclone III FPGAs consume 75 percent less power than some competitors, according to Altera.

The eight devices in the family, in a 65-nanometer process from Taiwan Semiconductor Manufacturing Co. Ltd., can be configured with up to 119,088 logic elements, 3.9 Mbits of memory and 288 multipliers (18 x 18) for DSP-intensive applications--all at a power consumption of less than 0.5 watt in static mode.

At a 20 percent lower cost per logic element than the company's older-generation, 90-nm Cyclone II, the Cyclone III is expected to bring FPGAs into more cost-sensitive low-power applications, said Luanne Schirrmeister, director of marketing for low-cost products at Altera (San Jose). "What we have is an FPGA in a cell phone process," she said.

Like rival Xilinx Inc., Altera continues to push FPGAs into DSP territory. In some high-end markets, DSPs, FPGAs and ASICs can coexist in systems. But FPGAs can be a better fit than standalone DSPs in performance-hungry applications with substantial parallelism, such as high-end communi cations infrastructure equipment, according to a study by tech consultancy Berkeley Design Technology Inc.

With its DSP-based circuitry, the Cyclone III is optimized for HDTV, industrial control and military-based encryption systems, Schirrmeister said.

Altera is rolling out the products during a chip industry lull that has seen the FPGA/PLD market take it on the chin. The worldwide FPGA/PLD market is expected to hit $3.7 billion this year, up just 2.9 percent from 2006, according to Gartner Inc. That compares with 12.9 percent growth last year.

The research firm has also lowered its FPGA/PLD forecast for 2008, from 23.3 percent growth to 15.7 percent. The sector has been hit by excess inventories, a slowdown in the wireless market and a decline in average selling prices, said Gartner analyst Bryan Lewis.

Still, Altera appears to be well-positioned in the FPGA market, a competitive sector that includes Actel Corp., Lattice Semiconductor Corp., QuickLogic Corp., Xilinx and others. At the high end, Altera offers the Stratix III line of high-performance FPGAs, also based on 65-nm technology. The company also offers PLDs at the low end, as well as structured ASICs.

The Cyclone III is a midrange line. Altera rolled the first Cyclone FPGAs in 2002, positioning the devices against ASICs for high-volume applications. With the Cyclone III, the company is attacking not only ASICs, but also DSPs and other devices traditionally used in high-volume, low-power applications.

Compared with the 90-nm Cyclone II, the Cyclone III provides twice the density, three times the memory and more multipliers for DSP-like computations. The multipliers in the new devices deliver up to 260 MHz for high-bandwidth parallel processing, vs. 216 MHz in the Cyclone II.

The Cyclone III devices are the EP3C5, EP3C10, EP3C16, EP3C25, EP3C40, EP3C55, EP3C80 and EP3C120. The entry-level EP3C5 has 5,136 logic elements, 0.4 Mbit of memory, 23 multipliers and 181 I/O pins. The high-end EP3C120 has 119,088 logic elements, 3.9 Mbits of memory, 288 multipliers and 530 I/Os.

Altera is sampling the midrange EP3C25 now, with mass production slated for August. The part has 24,624 logic elements, 0.6 Mbit of memory, 66 multipliers and 214 I/O pins. All eight Cyclone III versions are expected to ship in volume by year's end. Pricing starts at $4. Development kits start at $199.

OEMs can begin their designs by downloading a free version of the Quartus II software from Altera.

For a limited time, the company is also offering a free version of its ModelSim-Altera software.



Related Links:

  • Xilinx aims 65-nm FPGAs at DSP applications



  •   Free Subscription to EE Times
    First Name Last Name
    Company Name Title
    Email address
      Click here for your Free Subscription to EETimes Europe
     
    CAREER CENTER
    Looking for a new job?
    SEARCH JOBS
    SPONSOR

    RECENT JOB POSTINGS
    CAREER NEWS
    DoD Recognizes University Scientists For Basic Research
    Annual awards to university faculty to conduct next-generation research projects were announced this week by the Defense Department.

    For more great jobs, career related news, features and services, please visit EETimes' Career Center.


    All White Papers »   

     
    Education and
    Learning


    Learn Now:












    Home | About | Editorial Calendar | Feedback | Subscriptions | Newsletter | Media Kit | Contact | Reprints|  RSS|   Digital|  Mobile
    Network Websites
    International
    Network Features




    All materials on this site Copyright © 2010 TechInsights, a Division of United Business Media LLC All rights reserved.
    Privacy Statement | Terms of Service | About