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SoC schedules: slip slidin' away
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Bring on the randomness

Variables introduced in such a process include the technical effects of shrinking die size and yields, a semiconductor R&D team's historical capabilities and tooling, and the impact of ever-expanding development teams that are often geographically far-flung. By pinning down such variables, "we can bring randomness into the model," Collett explained.

Expensive delays
Long delays are common in IC development, even among experienced chip vendors with ample engineering resources. For a high-profile example, one need look no further than an erstwhile Internet Protocol TV chip development partnership launched in 2004 between Microsoft Corp. and STMicroelectronics.

In looking for an innovative one-chip multimedia processor as a single hardware platform on which to develop its IPTV software, Microsoft settled on ST as its primary silicon vendor. But by November 2004, when Microsoft nabbed a $400 million IPTV deal from AT&T (then SBC Communications), ST was experiencing a substantial delay in its promised IC development.

Within weeks, ST lost Microsoft's confidence. It was unseated by Sigma Design, which in early 2005 became Microsoft's primary prototype partner--a failure that cost ST dearly. Today, Sigma Design has a 100 percent lock on Microsoft's growing IPTV design sockets.

Thomas Wille, senior director of innovation and technology in business line identification at NXP Semiconductors, acknowledged that around the same time, his group was also "having trouble in getting products out." In 2004, the average product delay was as high as 40 to 50 percent. For the identification group, with an 80 percent market share in government projects such as national ID cards and electronic passports, this across-the-board slippage was unacceptable.

When asked why such slippage happens, Wille said, "First, we tend to underestimate the complexity of a chip-- especially when it is a brand-new product. [Second,] we tend to understaff the project." Particularly if the project runs more than one year, a "resource dilution" begins to take place, he said. "As the project gets prolonged, things happen here and there, people get distracted, they are pulled into different projects to help out others."

Indeed, most semiconductor R&D teams handle multiple IC development projects. "There is usually a portfolio of projects to manage in parallel," said Benoît Calimez, program manager for business line car entertainment solutions at NXP. Taking on a new project is hard enough, he said, but simultaneously sustaining products that are supposed to phase out but are still hanging fire further complicates project management.

Most chip companies tend to determine the schedule and resource requirements of a new IC project essentially by hunch. "We relied upon experts within the project or sometimes brought in experts from other projects at NXP who were regarded for their competence," said Calimez.

But in complex chip development, aligning the expectations of executive management, marketing and chip architects in the R&D organization is one of the hardest things for an organization to pull off. While the marketing department tends to want everything, executive management often limits resources and the R&D team ends up overcommitting.



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Related Links:

  • Numetrics Online
  • Chip design lacks system predictability



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