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SoC schedules: slip slidin' away
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Fact-based information

Numetrics believes its ERP tools will help by offering fact-based information. "We'd like to think our tools are not only a friend of engineering teams, but also a friend of executive teams," Collett said.

The advantage of using Numetrics tools, said NXP's Calimez, is that "you can mix the quantitative data from Numetrics with the internal system's qualitative judgment."

After applying Numetrics' tools to nearly all of his group's projects, Wille said, "we improved predictability by 90 percent per year. Further, we made a 64 percent reduction in cycle time." Calimez noted that his group would not approve any project concept without first benchmarking the initial plans with an early project estimate from Numetrics.

Next step
Numetrics, of course, is not alone in analyzing delays and pioneering improvements in the various tools chip makers use. Another company tackling the problem is Silistix Inc. (San Jose, Calif.). David Lautzenheiser, vice president of marketing at Silistix, attributed chip development delays to "the move from single-function design to systems that require an altogether new approach than has historically been employed." The company is working to solve that problem.

Ken Lowe, vice president of strategic marketing at Sigma Design, pointed out that chip companies are under increasing pressure to get products out quickly. Today's new chips typically run much faster than earlier ICs, while chip geometry is getting ever smaller, he said. The company's SMP8634 chip used for IPTV set-top boxes and Blu-ray player/ recorders already has 4.5 million gates with 4 Mbits of memory. The next-generation chip consists of 7 million gates.

Accenture's Grant offered a few other reasons for schedule delays. Throughout the design life cycle, chip design requirements tend to be managed inconsistently, he said. There are "challenges with integrating chip design/product road maps, in tracking the overall bill-of-materials costs, and in storing and leveraging product data," said Grant.

Ultimately, Grant said, "The key question is: how do you connect, integrate the three layers of ERP, product life cycle management [PLM] and EDA tools?" ERP tools don't always talk to the other two. "Groups who are making progress with this are dealing with this challenge from a data perspective, such as product data," he said. "The aim is to get PLM connecting into the overall ERP tool."

Today, Numetrics' ERP tools target IC hardware design, but not software that runs on the ICs. That could turn out to be a major missing piece, especially as software complexity becomes a bigger factor in product development delays.

Numetrics indicated that an ERP tool for software development is on its way. NXP's Calimez said, "We are aggregating a database to help create software tools."

Numetrics' ERP software suite, called NMX-ERP 3.0, ranges from $35,000 to $95,000 per IC project, depending on each project's complexity and size.



Page 1: SoC schedules: slip slidin' away
Page 2: Bring on the randomness

Page 1 2 3

Related Links:

  • Numetrics Online
  • Chip design lacks system predictability



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