The economic roller coaster of the past five years has left much of the semiconductor industry breathless, uncertain and wondering. Industry trends of the past few quarters suggest, however, that important shifts in both the technology and economics of semiconductors are combining to create a new and more favorable environment for chip innovation and success.

Despite the remarkable rise in silicon density, chip design is getting more flexible and more automated, making investment in new silicon platforms increasingly attractive. The bursting of the semiconductor bubble in 2001-2002, and the shift of many glue-logic functions into FPGAs, seemed to confirm the end of the custom-silicon design era. Instead, we're experiencing significant increases in new, complex system-on-chip (SoC) design activity. New design starts targeting 130- and 90-nanometer technology are rising rapidly and the total number of transistors in design is rising exponentially. And all the new silicon capacity is triggering more sophisticated designs — a wider variety of application functions integrated on a single die, powered by more embedded processors cores and memories.

What has triggered this renaissance in chip design? There are two primary factors. First, the characteristics most needed by the new consumer platforms — long battery life, small physical size, high performance for the real-time media experience — are addressable only with high-integration SoCs. Standard microprocessors and FPGAs are too big, too expensive, too power hungry and too generic.

Second, remarkable innovations in design technology, especially the growing success of third-party intellectual property; the automatic generation of optimized microprocessors; improved physical synthesis tools; and the successful application of modern software development methods to high-volume embedded systems all contribute to a significant shift in the return-on-investment equation of chip development. Higher degrees of automation are reducing the design cost per function.

More pervasive SoC programmability is increasing the flexibility — hence the volume and profitability — of each design. Building new chips is getting much more attractive today than just a couple of years ago. This design renaissance carries some fresh challenges. End-product markets are increasingly diverse and fast-paced. A greater range of building-block technologies and global engineering strategies are available. New capital sources and new supply chain structures are constantly changing the rules. Successful silicon innovators must stay alert and aggressive. If they do, the rewards will be bigger than ever.

The winners will be the ones who build platforms that are thoroughly optimized for the incredible power-efficiency, throughput and cost demands of emerging applications, and thoroughly programmable to accommodate the accelerating pace of market change.

Chris Rowen, President and Chief Executive Officer Tensilica Inc., Santa Clara, Calif.