Though the electronic design automation (EDA) market didn't feel the sting of recession nearly as dramatically as most other segments, it certainly experienced a significant spending slowdown over the past several years. The recession greatly curbed EDA market expansion, which bottomed out with nearly flat growth in 2003. That trend is now being reversed, with new tool investments ramping up fairly quickly.
As the economy has improved, signs of recovery in the EDA market are apparent. Key vendors, including Synopsys, Cadence, Mentor Graphics, Magma and Synplicity, have seen a substantial revenue uptick right from the start of the year. Merger and acquisition activity is also on the rise, as larger EDA vendors purchase interesting and promising technologies being developed by some of the smaller upstart companies.
Business improvements have been visible in virtually all geographies and market segments. Investment in new tools and technologies for 90-nm semiconductor design is increasing rapidly, and early design activity at even smaller geometries is beginning. Still, there are several strategic issues for the EDA market that are affecting the industry resurgence.
The burgeoning size of the next generation of systems-on-chip is driving the industry to an inflection point in the development of design tools. The tremendous number of gates in the leading-edge SoC designs of today and tomorrow require a new breed of tools to create these complex devices. With gate counts of more than 100 million for the latest 90-nm designs, the old design methodologies are no longer adequate to achieve design closure in a reasonable time frame to meet typical market windows.
Consequently, electronic system-level tools have begun to fill the void. Though the industry twice attempted, unsuccessfully, to introduce ESL-type tools during the 1990s, this time users are ready for the transition. The register-transfer-level (RTL) tools that previously were at the heart of IC design are being eclipsed by an ESL-centric methodology. Designers who traditionally have worked with RTL tools are gradually moving either upstream to concentrate on the ESL tool set or downstream to focus on CAD implementation. The RTL tools-formerly the largest segment of the chip design market-are starting to get squeezed out of the middle.
The 2004 and 2005 forecast scenarios are largely contingent on the fervor of the semiconductor industry recovery now under way. Most EDA power users have already completed or are in the process of conducting their RTL implementation software retooling. The next few years of EDA growth depend on the timing of similar tool upgrades for mainstream users and the next investment by power users into silicon virtual-prototype, intelligent-testbench and ESL tools.
Because ESL tools remain in an early stage of their market acceptance, in the short term the slower-than-anticipated RTL implementation tool adoption among the mainstream users will temper EDA market growth. EDA growth is forecast to be 11.8 percent in 2004 and 17.9 percent in 2005. As ESL tools continue to gain market momentum, EDA growth should follow suit, reaching more than 20 percent in 2006 and 2007. By 2008, the next cyclical downturn of the semiconductor industry is expected to negatively affect EDA market growth, lowering it below 15 percent.
The EDA market is embarking on an era of dramatic change to the design methodologies and tool sets to which users have become accustomed for 130-nanometer processes and above. The inflection point marking the transition from an RTL-based methodology to an ESL-centered design approach will probably cause some uncertainty for both EDA vendors and users in the near term. It will take some time for everyone involved to adapt to the new models for design procedures-such as RTL handoff-and adjust to the new roles for designers and semiconductor manufacturers. Once it gets past this transition period, though, the EDA market holds the prospect of excellent growth.
Laurie Balch is principal analyst for design and engineering at Gartner Dataquest (San Jose, Calif.).