The issue of verification has never been larger. Today, functional verification is at least as big a task as design and, in many cases, much larger. This has been the case for awhile now and the situation doesn't appear to be changing any time soon. If anything, verification is becoming an even larger and more difficult task.
It isn't hard to see why. More transistors and larger die sizes result in greater complexity. It is common today to see single chips with multiple CPUs and multiple memory systems, a DSP, and various interfaces such as USB, 802.11, and Bluetooth not to mention a healthy smattering of analog functions. And don't forget power management.
Accompanying all of the increased complexity is increased power consumption although, thanks to designer creativity, power consumption has not increased as rapidly as functional complexity. Various types of power reduction techniques have been employed to keep power concerns from derailing functional aspirations. After all, what good is a shiny new phone with video capabilities if the battery life is measured in minutes instead of hours or days?
Achieving major functional advances while tightly constraining power is no small feat, but this has been accomplished at the expense of overall complexity. Functional complexity increases since the power supply can no longer be viewed as a constant--the supply voltage may vary, such as with dynamic voltage and frequency scaling (DVFS), or it may be shut off altogether, such as with power gating. These variations are usually controlled by a new functional block--the power management controller (PMC)--and its operation must be verified as well. To make things even more interesting, it is often the case that multiple blocks have different power supplies, each one varying independently such that it is insufficient to verify the proper functioning of each block alone--they must be verified working together, under the control of the PMC, with the various supplies changing dynamically and even shutting off completely. And the challenges don't stop there.
While focusing upon these daunting functional verification tasks, it's easy to forget that the motivation for all of this additional power complexity was to constrain power consumption, and that we also need to verify whether or not we are meeting our power specifications in addition to our functional specifications.