The 16-Mbit MRAM chip features read and write cycles of around 30 to 40 nanoseconds, making it competitive with established DRAM memory chips. The feature would give it a huge advantage over flash memories, along with lower power requirements than a comparable DRAM chip.

The prototype was manufactured with a 0.18 micron CMOS process used for standard logic chips, said Wilhelm Beinvogl, CTO of Infineon's memory product division. Using the magnetic tunnel junction technology, the device communicates through an interface similar to the one used for SRAMs. Compared to existing multi-megabit MRAM chips, Infineon's boasts the highest capacity. With only three metal layers, the chip is relatively easily to produce, Beinvogl claimed.

The cell size of just 1.42 microns². With a total are of 79 millimeters², the entire device is larger than existing memory products with the same capacity. "Before we go to commercial production there remains a lot of work to do" to reduce the chip's physical size, Beinvogl said.

Using an evaluation board for mobile phones, Infineon proved the device's functionality. Standard flash and SRAM memory chips were replaced on the board with new MRAM device. The board's display showed the MRAM's output, an animated Infineon logo.

Applications for MRAM technology could include "instant on" PCs that do not have to be booted up, Beinvogl said. With their tolerance for high temperatures, MRAM devices could also open new opportunities in the automotive and industrial markets.

The next development steps include transferring the design to a 0.13 micron process. "We will see this happen very soon," Beinvogl said. Before commercial can begin, Infineon wants to shrink the chip structures even further. Beinvogl declined to discuss a production schedule or say when a commercial product would be ready.

Infineon developed its MRAM technology at Altis, a joint venture with IBM Microelectronics in Corbeil Essones, France. The contract with IBM runs through 2006. Along with MRAM and flash technology, Infineon is also working on ferro-electric RAM development.

— Christoph Hammerschmidt is editor-in-chief of EE Times.de.