For edge networking systems that link subscribers to business and carrier networks the key focus is delivering maximum performance with the fewest number of systems. Juniper claims it has a lead against rivals with its latest products, thanks in large part to Junos Trio, the company's fourth-generation network chip set.

Built in 65 nm technology, Junos Trio consists of four devices—a packet processor, queuing chip, buffer manager and interface chip. Together they can deliver 120 Gbits/second of throughput while handling Layer 2 and Layer 3 lookups. The chips also handle a range of Layer 4 through Layer 7 jobs such as managing user-programmable quality of service parameters.

By contrast, Cisco's latest ASR-9000 router has throughput of about 80 Gbits/s and the Alcatel-Lucent SP1 delivers about 60 Gbits/s, said Luc Ceuppens, vice president of product marketing for Juniper. The chips will consume about 37W per 10 Gbit/s Ethernet link, compared to 60-90W consumed by competing 90nm chip sets, he added.

Juniper claims its new Junos Trio chip set beats competitors on several fronts. Click on image to enlarge.

Juniper is keeping mum on much of the secret sauce of Junos Trio. For example, the chip set uses 16 cores, but Juniper would not say if they are homegrown or off-the-shelf cores.

In addition, the company is not disclosing how much memory the chips can access. Ceuppens said the focus is primarily on use of commodity SDRAMs and SRAMs, but the chips optionally can use TCAM for optimizing firewall filters and DDR for flow table storage-based applications.

The chips use a new condensed and complex instruction set optimized for edge networking and tied to the company's proprietary Junos operating system. But Juniper is not publishing details of the instruction set.

The chip set includes Ethernet MACs and interfaces for SONET/SDH. Juniper has more than 30 patents pending on the new chip set which uses a total of 1.5 billion transistors.

"We invested more than $80 million over the last five years to develop Junos Trio," said Pradeep Sindhu, Juniper's founder and chief technology officer in a prepared statement.

The company is said to have as many as 1,200 ASIC designers who develop more than a dozen ASICs currently in use in its systems. It would not say exactly how many engineers worked on the new chip set.