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ISSCC: Economics will delay the single-chip phone
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EE Times


SAN FRANCISCO — While a cellular telephone IC integrating radio and base-band processing could become technically possible within the next few years, economic reasons will most likely delay its adoption for the foreseeable future.

That was one of the conclusions of an International Solid State Circuits Conference evening panel session that see-sawed back and forth on whether or not the single-chip radio is a sensible application of integration.

Although RF CMOS is a hot research topic, the general consensus was that for commercial use, a variety of chips in "best of breed" process technologies for different functions within multichip modules is the likely way forward.

The discussion made it clear that the definition of a single-chip radio is as contentious as the prospects for integration.

For some panelists, the only definition of worth was a true single chip from antenna to microphone that would have to include what today is implemented as hundreds of discrete passive components, an RF power amplifier, RF signal processing, low-frequency analog circuitry, digital baseband, power management and memories.

For others, the debate was about the possibility of integrating RF signal processing with digital circuitry and whether that would go into CMOS process technology or a BiCMOS process, either in silicon or in silicon-germanium.

The panel was divided into two camps. One held that the process of integration is inexorable, and maintained that not only single-chip radios, but also single-chip phones are inevitable. The other side offered a host of reasons to back their contention that integration of the radio section and the digital baseband is not inevitable.

Werner Gruber, vice president of new technology sourcing at Nokia Mobile Phones (Salo, Finland) said, "Nokia does not believe a single-chip solution is viable for as long as we can see. It may be technologically here but it will not meet the main driver of our industry: cost."

Ken Hansen, director of Motorola's wireless technology center in Austin, Texas, took up the same theme, pointing out the complexity of issues associated with the mobile phone: "What does make sense is to optimize cost, part count, battery life, size weight and development-cycle time." Hansen, the lone U.S. representative on an otherwise European panel, concluded, "It's unlikely you'll see a single-chip radio in the near future."

Michiel Steyaert, from the Catholic University of Leuven (Belgium) used more general arguments to show that the more discretes are integrated, the more cost is reduced, and the fewer times a signal moves on and off chip, the less energy is wasted in driving parasitic capacitance. He said integration would happen because of those two reasons.

Using the narrower definition of a single-chip radio, from antenna to DSP, Jan Sevenhans, of the VLSI design research staff at Alcatel Bell (Antwerp, Belgium), said the issue was whether CMOS would move out from the baseband or whether SiGe bipolar followed by BiCMOS would move from higher frequencies down to digital. He pointed out that at ISSCC as well as other conferences, there are many academic papers on aspects of RF CMOS but, so far, few products have emerged.

Joseph Fenk, director of high-frequency product definition at Siemens semiconductor division, gave a detailed analysis of cellular, cordless and communications in the unregulated ISM [instrumentation, scientific, medical] band. Fenk used historical trends to conclude that a cellular chip combining baseband and RF would not include the power amplifier and was not likely within five years. For cordless telephony, however, his prediction was that a single chip, possibly including a power amplifier, would arrive within two to five years, probably implemented in CMOS. He said that for the short-range, low-power applications in the ISM band, a CMOS single chip was possible within one to three years.

When the debate was opened up to the floor, those in the pro-integration group were asked to explain how such challenges as isolation between digitally generated noise and sensitive RF circuits could be overcome on a single chip, and how high Q factor passives could be integrated.

Others pointed out that, unlike digital circuits, analog circuitry does not benefit from process technology scaling. The demanding nature of the application and pressure to improve power consumption and cost benefits meant that it was not possible to use anything but the most appropriate technology for each section.

Panelist Ton Wagemans, of Philips Research Laboratories (Eindhoven, The Netherlands) pointed out that while bipolar processes are not suitable for digital processing, analog CMOS is not yet good enough for RF circuitry. "A digital-analog split makes sense even if you could use a single process," he said. "An MCM is more attractive for economic production and also for reasons of crosstalk."

Steyaert argued that scaling in digital technology would help with integration. "Thanks to digital design, we can do more DSP processing and we can relax the analog building block specifications," he said.

But that led to the challenges posed by the increasing demands of successive standards. Gruber said, "With next-generation standards, we are looking for 2Mbit/second data and memory on-chip. The digital is not getting easier. The data rate goes up but power consumption must go down."

Single-chip proponent Steyaert said, "We have to attack the problem at several levels: new designs with different topologies, design the digital section so as not to create spurious signals in [the RF] band and so on. It can be done with ADC and DSP, so why not with RF?"



Related Links:

  • EET's ISSCC coverage



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