TOKYO — Hitachi Ltd. has developed a technology that dramatically lowers power consumption in standby mode of a large-scale LSI device. When the chip is installed in a portable unit such as a handheld PC, the battery hours in standby mode will be extended more than 10 times, Hitachi researchers reported at the International Solid-State Circuits Conference here this week.

Hitachi plans to apply the technology to its SH4 processor and offer it by the middle of this year. It will also go into its HG75C ASIC series, which uses a 0.18-micron process. The technique-based on the use of thousands of specialized cell switches to control the substrate voltage of each transistor-is applicable to all large-scale CMOS LSIs, researchers said.

Portable information equipment needs to retain data for a quick start, so it does not shut down power completely when switched off. Therefore, reducing power consumption during standby is essential. Hitachi believes that in the future, not only portables but also home electronics products that use LSIs fabricated on a deep-submicron process may benefit, lowering standby power consumption for environmental reasons.

The deeper the fabrication process goes beyond 0.2 micron, the bigger the problem with power consumption in standby mode. Even when a transistor is theoretically off, there is a slight current leakage. For LSIs with large numbers of transistors fabricated on a fine process, that small leakage at each transistor adds up to a level that causes practical trouble.

"Especially for portable equipment [driven by batteries], it is a problem," said Katsuro Sasaki, department manager of Hitachi's System LSI Research department, here.

Hitachi data shows that the leakage current exceeds 100 microamperes for devices on a 0.2-micron process. Leakage will go over 1 mA when the process goes to 0.18 micron and to 0.1 A when the process is 0.1 micron.

"If leakage goes over 100 A, it is too much for portable applications," Sasaki said. "We cannot use such devices in portables."

Currently, designers have proposed two ways to attack this problem. One is to shut down the external power completely in standby mode, but that causes problems for users, as data is not retained when the power is off. Another is to exploit the so-called "body effect"-the fact that a transistor's threshold voltage rises when a voltage is applied to its substrate-to reduce subthreshold leakage current in standby mode. The leakage current drops when the threshold voltage becomes high.

But it's hard to control the substrate voltage of each transistor uniformly, and until now this technique has not reached a practical level of use, Sasaki said.

Hitachi researchers claim to have resolved its disadvantages of the body-effect technique by developing two technologies: "switched-substrate impedance" and "self-substrate-biased data retention." Combining these techniques, the team said last week that they have succeeded in reducing the subthreshold leakage current of megatransistor processors that operate at over 100 MHz.

When Hitachi's technologies are applied, the leakage current will be theoretically less than 100 A, even if the process goes to 0.1 micron.

"The technologies will make it possible to use a high-speed, large-scale LSIs for portable equipment," said Sasaki.

Researchers implemented the technologies in Hitachi's SH4 RISC processor, a 3.3 million-transistor part fabricated on a 0.2-micron process. It operates at 200 MHz on 1.8 V.

They verified that the subthreshold leak current drops to about 1/650 compared with the equivalent processor without the technologies.

The switched-substrate-impedance scheme is based on distributing a large number of switch cells over the entire surface of an LSI (in case of the SH4, about 10,000 switch cells were used). In standby mode, substrates in the 1.8-V logic circuit are driven with a high-voltage, high-output impedance driver in the Voltage Bias Control macro located at the edge of the device to suppress leakage. In active mode, the switch cells drive the substrates, reducing substrate impedance and ensuring fast operation.

This scheme reduced leakage current to 29.8 A for the SH4, a big cut from the typical 1,300 A. The total current consumption for the chip is 46.5 A, Hitachi said.

The 10,000 switch cells increase die size about 5 percent. But they are designed in tandem with other transistors in CMOS, so no additional processes are needed and the devices can be fabricated on a conventional production line, according to Sasaki.

As a second step to further trim power consumption, the Hitachi team introduced a self-substrate-biased data-retention mode that lowers the source voltage in standby below what it is in operational mode. In the experiment, the voltage was switched from 1.8 V (operational) to 1 V in standby. The subthreshold leakage current dropped to 2.1 A.

Hitachi uses the SH3 for its Windows CE products. Its current consumption in standby mode is about 100 A. When the Windows CE device is switched off, it will retain data for 1,000 hours with a battery (assuming the power is supplied only to LSIs and 10 A is consumed by the peripheral LSIs).

Data retention, Hitachi researchers estimate, will drop to 300 hours when an SH4 is used with the same battery. That's because it has 1-mA current consumption in standby mode. But with the leakage-lowering technologies, the SH4 will consume about 10 A, including 2-A leakage. That amounts to about 10 times longer data retention, or 3,000 hours, according to Hitachi.

"Our technology works not only in standby mode when a portable unit is switched off but also when it is on," said Sasaki. "Portable equipment has idle or standby modes even when it is switched on. If system engineers design a portable unit in which our technologies work in such idle modes as well, users will feel as if its battery life is extended largely."