While existing floor planners are generally point tools that work at the gate level, IC Wizard will be used at the architectural level, register-transfer level (RTL), or structural or physical levels. After block-level place-and-route, for instance, it can be used for chip-level assembly and global routing of system-on-a-chip designs with hundreds of intellectual-property (IP) blocks.

IC Wizard is also said to be far more automated than existing floor planners. "Today's tools semi-manually place blocks," said Aristo marketing executive Gloria Nichols. "What we define as floor-plan synthesis is automatically building floor plans from a design description and generating multiple alternatives."

Aristo's direction is consistent with controversial arguments by Kurt Keutzer, professor of electrical engineering and computer science at the University of California at Berkeley, that interconnect delays can be kept manageable if designs are divided into 50,000-gate blocks. Instead of merging synthesis and layout, according to that reasoning, EDA vendors should be solving the chip-level block assembly problem. That's exactly where Aristo is positioned.

Simon Bloch, president and chief executive officer of Aristo (Cupertino, Calif.), said floor-plan synthesis results in faster time-to-market, better timing and power, and more manageable designs. "The level of abstraction for complex chips must go up, and that's why were dealing at the block level," he said.

IC Wizard, in fact, works only at the block level; it doesn't do any placement, routing or floor planning for what's inside the blocks. Thus, the company argues, designers don't have to buy all their floor-planning and physical design tools from the same vendor, and IC Wizard can work effectively with cell-level physical design tools from existing vendors or startups.

Cockpit view

Aristo further claims IC Wizard can be used as a "cockpit" from which other synthesis and place-and-route tools are invoked under a common user interface. It includes application programming interfaces and supports various industry standards and extension languages.

The product is due to ship in July. Aristo already has testimonials from such beta-site customers as ATI/Chromatic Research, GigaPixel and AppNet.

IC Wizard can first be used well before synthesis. It accepts "whatever you know about the search, GigaPixel and AppNet.

IC Wizard can first be used well before synthesis. It accepts "whatever you know about the design," said Jacob Greidinger, vice president and chief technology officer at Aristo. That could include a partial net-list, VHDL or Verilog code, information about reused blocks and "guesses" about black boxes that might be needed.

Users can also provide Library Exchange Format (LEF) data to bring process data into the product. Alternatively, they can select "default" process information built into IC Wizard.

"We will employ some very accurate physical algorithms even at the pre-RTL stages of the design," Greidinger said.

Users also enter constraints in such areas as timing, area, hierarchy, topology, layer usage and power. IC Wizard accepts "use rules" for specific blocks.

IC Wizard optimizes the shape, area, pad locations, pin locations and interconnect structure for each block, and it incorporates the interblock interconnect information when applying design constraints and setting block budgets. It can provide synthesis tools with "in-context" block-boundary conditions that are more accurate than statistical wire-load models.

IC Wizard's output includes a block placement in Design Exchange Format or GDSII; a modified HDL net-list if appropriate; and timing, power and area estimates based on Aristo's fast 2-D extractor. The accuracy, said Greidinger, "depends on the accuracy of your input."

At the architectural level, Greidinger said, IC Wizard can explore trade-offs among process choices, partitioning strategies and IP cores. Then, as users synthesize blocks, the information in IC Wizard becomes "hardened," and the accuracy of the timing, area and power budgeting can increase.

After placement and routing of the individual blocks, Greidinger said, IC Wizard can tweak the floor plan and the global routing as needed. The product does not, however, have a detailed top-level router; that task would need to be finished with a product such as Cadence Design Systems' IC Craftsman. Aristo plans to add a top-level router in the future.

IC Wizard will ship in July on Unix and Windows NT platforms and will start at $100,000.