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Stacked-chip interconnect makes board-level debut








EE Times


SAN DIEGO — With the achievement of a system-level demonstration of interconnect technology using optical methods, the 3D OptoElectronic Stack Processor Consortium has reached its first goal: to establish a new plateau in pc-board interconnect technology.

The goal of the consortium, which was announced two years ago and involves government, university and commercial groups, is to integrate optical interconnects between circuit-board chips in novel "chip stacks" and develop a modular connection system between the packaged stacks, which would be mounted on printed-circuit boards.

"We have shown that it is possible to use standard electronic packaging to put optical interconnect systems on a PCB [pc board]," said Phillipe Mar-chand, a University of California, San Diego optical researcher on the project. "Now we have an optical interconnect module, packaged in plastic, that simply snaps onto the PCB-mounted modules and self-aligns." The snap-on modules establish free-space optical interconnects between the packaged chip stacks. An important goal of the project has been to establish packaging and assembly procedures that use standard electronic manufacturing systems.

"I wouldn't say that we are ready for commercial production, but we have shown that all the interconnect subsystems involved work in industry-standard packaging technology," he said.

The crucial advantage for system integrators will be the availability of a modular, scalable optical-interconnect system that can be assembled just like any other electronic system. The open question for the new technology is exactly where it will be applied. "People like Sun Microsystems and Cisco are looking at the project — it would be very useful as interconnect in multiprocessor systems or in network switching — but they don't have any specific plans for using it at this point," Marchand said.

Network switching might be a promising area, he said, due to the rapid increase in metropolitan-area optical networks.

Right now, it is the military that is interested in developing applications with the technology, since highly dense electronics are a high priority.

The consortium was kicked off with $16 million in funding from the Defense Advanced Research Projects Agency and involves a number of groups, including Irvine Sensors Corp., Honeywell Technology Center, Kopin Corp., UCSD OptoElectronic Computing Group as well as Mercury Computer Systems and Sun Microsystems.

A group at the University of Pittsburgh has developed an optical CAD system for designing free-space interconnects. Originally, the consortium aimed to have a working fast Fourier transform processor in three and a half years.

The work must proceed along a broad, interdisciplinary front. Special vertical-cavity, surface-emitting lasers (VCSELs) have been developed for the 3-D silicon chip stacks and the stacks themselves have required special materials innovations such as interleaved diamond substrates to dissipate up to 300 W of heat per stack. Special CAD systems have been developed to help engineers navigate the new design territory.











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