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Broadcom, Vertex introduce new concepts for enterprise QoS
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EE Times


IRVINE, Calif. — August is proving to be a busy month for bringing new mixed-traffic switching capabilities into LAN topologies. Broadcom Corp. is sampling the first fruits of its acquisition of Maverick Networks Inc., as its BCM5600 StrataSwitch family brings quality-of-service prioritization features to the so-called "24 x 2" switching topology widely used in pure Layer 2 switch designs.

Meanwhile, Vertex Networks Inc. (San Diego), which has worked on Layer 3 QoS features for almost a year in its XpressFlow family, is launching a special eight-port product with advanced packet buffering algorithms, intended to offer voice-over-Internet Protocol (VoIP) support to the unmanaged work-group switch market. In deference to the class-of-service queuing algorithms it borrowed from its higher-end family, Vertex is calling its new DS108 switching chip the "CoSMOS" processor.

In Layer 2 (bridging-only) switches, a popular configuration for chips that combine several media-access controllers is twenty-four 10/100 ports and dual Gigabit Ethernet ports, dubbed a "24 x 2" matrix. Broadcom applied this concept to Layer 3 switching, adding a routing engine capable of making pure route-forwarding tasks at wire speed, as well as functions from Layer 4 TCP/UDP port assignments up to Layer 7 application-based forwarding.

The routing-engine design, which came from Maverick, was combined with three of Broadcom's octal MACs, dual Gigabit Ethernet MACs and packet buffers for the 10/100 channels.

Integrated management

For now, Broadcom has kept switch management in a separate CPU core outside the BCM5600, on a CompactPCI card with a separate PowerPC chip on board. In future generations, this management could move inside StrataSwitch by using an embedded RISC core.

The BCM5600 incorporates 60 million transistors and 4 million gates. A common cache buffer pool is implemented in 8 Mbytes of on-chip SRAM. Greg Wolfson, product-line manager for enterprise products, said the key to avoiding complex off-chip buses to link switches and protocol processors was development of a 9-Gbit/second internal bus designed in three parts: data bus, track-and-lock protocol bus and arbitration bus.

A highly pipelined memory-management unit was necessitated by the chip's use of packets, cells and time slots for the most efficient packet prioritization. Wolfson said the cells are converted to slots to allow the use of commodity synchronous DRAM for storage.

The Broadcom switch performs "content-aware classification" via a fast filter processor on all ports. It examines each packet up to 64 bytes deep, then looks up header attributes in a rules table. Broadcom has defined four service classes for packets, and will assign each packet to one of four queues on each port. The filter processor can filter up to 6.6 million packets/s, regardless of whether they are forwarded at Layers 2, 3 or 4.

An integrated PCI bridge provides access to off-chip management processors. The BCM5600 also allows cascaded functions up to 32 deep.

For its part, Vertex has elected to provide a stripped-down set of QoS functions for work-group switches. The aim of the nine-port DS108 is to add VoIP functions, routed through a 100-Mbit Media Independent Interface port, into an unmanaged eight-port switching device that can use round-robin queuing to add packetized voice into simple switched Ethernet work groups.

LAN work groups are beginning to introduce IP phones alongside computers at the desktop, and switch vendors are looking for a way to bring in prioritized voice without moving to costly management functions in the switch. A VoIP-enabled unmanaged switch would be far more cost-effective to deploy than a remote-access router with VoIP functions, said director of marketing Tim Thompson.

Vertex borrowed two QoS algorithms from its XpressFlow 2080 Layer 3 family: weighted round-robin queuing to schedule packets into two output queues, and weighted random early detection and drop to handle congestion through dropping unnecessary packets — in essence, bypassing traditional Ethernet methods of flow control. Prioritization is set using the VLAN tagging field, and three type-of-service/differentiated-service header fields. But the effectiveness of the DS108 architecture will depend on the rollout of Microsoft's Windows 2000, which will ensure that PC clients can handle explicit differentiated-service scheduling.

The 208-pin DS108 will ship with a development kit that includes schematics, bill of materials and a special utility for configuring off-chip E2PROM.

Broadcom is quoting volume prices of under $100 for the BCM5600. Vertex is aiming at system bill-of-materials costs of less than $65 for an eight-port switch, based on chip costs of less than $18 per device in high volume.






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