PALM SPRINGS, Calif. Bowing to pressure from system OEMs and DRAM vendors alike, Intel Corp. announced this week that it will support PC133 synchronous DRAMs with an Intel chip set that the company said won't be ready until the first half of 2000.
The announcement here at the Fall Intel Developer Forum (IDF) was acknowledgement of what many have been saying for a year: that the cost of manufacturing, packaging and testing Rambus DRAMs is too high for most of the cost-sensitive PC industry.
To that end, Intel and Rambus Inc. (Mountain View, Calif.) announced the formation of the Rambus Implementers Forum, a committee of DRAM makers charged with finding ways to reduce costs. Among their biggest tasks will be deciding how to cut the number of memory banks on each RDRAM from the current two sets of 16 dependent banks, a source of die size bloat.
But Intel executives made it clear that their support for PC133 was reluctant, and that the long-term goal remains establishing the Rambus memory technology in both the performance and then the low-cost segments of the PC industry. Intel fellow Peter MacWilliams said system OEMs began pressuring Intel to support PC133 SDRAMs in March, after Intel said progress in its Camino chip set and RDRAM availability would not support a summer commercial rollout. Since then, DRAM makers have rallied behind the PC133 and double-data-rate SDRAMs in a big way.
MacWilliams said on Wednesday (Sept. 1) that he views the PC133 3-3-3 SDRAMs as delivering little performance gain over PC100 SDRAMs with a 2-2-2 clock-cycle latency setup for strobing and refresh.
"People look at numbers. Bigger numbers are better," he said, referring to the likelihood that some consumers will prefer PC133 memory over PC100.
Rambus-based desktops with the Pentium III processor are set to start shipping shortly after the Sept. 27 rollout of the 820 (Camino) chip set, which supports not only Rambus but an AGP4X graphics port and a 133-MHz front-side bus. At IDF, Intel chief executive officer Craig Barrett indicated he expects the 0.18-micron Coppermine processor to ship in October, with a top speed grade in the 700-MHz range. Intel had expected that the combination of Coppermine, Camino, Rambus and Windows 2000 would create a strong new product line for the fourth-quarter selling season.
However, only one DRAM vendor, Samsung Electronics, is thus far capable of shipping RDRAMs in any significant quantities, with others expected to follow later this year and in 2000. Without a sharp increase in supply, the high end of the desktop market will be capacity constrained. Until the top four DRAM vendors Samsung, Micron Technology, Hyundai Electronics and NEC create a competitive marketplace, RDRAM prices are expected to remain at premiums the bulk of the industry can't afford, said George Iwanyc, a memory analyst with Dataquest Inc. (San Jose, Calif.).
Janet Ramkissoon, technology analyst at Quadra Capital Inc. (New York), said Intel and Rambus failed to pay sufficient attention to the very real manufacturing challenges RDRAMs entail. "I think we're left with a malaise. Intel says its PC133 chip set won't be ready until the first half of next year, which leaves a six-month gap for many of the system OEMs." Ramkissoon said the Rambus program "is in a disastrous situation as far as costs go. . . . Too many people listen at IDF or Hot Chips or wherever, [yet] don't consider the manufacturing issues presented by some of their new technologies."
Lonely at the top
Samsung is expected to profit handsomely from its position as the primary RDRAM supplier until other memory makers catch up. An NEC Corp. executive said NEC is just starting to ramp up commercial production of its 128-Mbit RDRAM. Toshiba Corp., another early adopter of the Rambus technology, is expected to keep much of its RDRAM production dedicated to supplying the needs of Sony Corp's Playstation II, which includes a dual-channel Rambus memory architecture. LG Semicon, another early Rambus vendor, is being absorbed by Hundai Electronics, delaying RDRAM production there. Infineon Technologies, the former Siemens, is expected to start volume RDRAM production in the fourth quarter.
All the RDRAM vendors may have to shift to tighter processes to get decent yields of the full-speed RDRAMs, which run at a 400-MHz clock and achieve a 800-Mbit data rate with double-data-rate techniques.
The newly-announced Rambus Implementers Forum includes Hyundai, Micron, NEC, Samsung, Infineon and Toshiba, as well as Intel and Rambus. One of its biggest chores will be to tame the memory-bank problem.
MacWilliams said the forum may come up with one or more commonly accepted RDRAM designs with fewer memory banks, which would then be supported by iterations of the Intel chip sets. One suggestion is to trim the number of memory banks per chip to a single set of 16 dependent banks; another calls for four independent banks. The final decision "is up to each vendor, and over time Intel would build chip sets that would support different approaches," he said.
Three years ago, Rambus engineers thought adding banks would allow the Rambus technology to offer on-chip concurrency, fetching bits from multiple banks at the same time. The goal was to reduce first-access latency, an issue that dogged RDRAM's performance in the early going.
Geoff Tate, chief executive officer of Rambus, said that over the past few years, Rambus and the RDRAM vendors have come to realize that having so many on-chip memory banks made it more difficult to efficiently lay out the redundancy bits needed to keep yields at respectable levels. Adding redundancy bits for each bank added to the chip's die size, and thus increased costs. Cutting redundancy bits can also raise costs by reducing yields.
"If we knew then what we know now about the die size impact, we would have decided on fewer banks. But the issue is not just reducing the number of banks, it is making sure there is compatibility among the various DRAM vendors," Tate said.
Tate said he expects the memory-bank issue to be decided in the next few months. As vendors create new mask sets for shrink versions of the various 128-Mbit RDRAM implementations, the reduced-bank design would be implemented.
Board-layout concerns
At IDF, system engineers were told that extreme care is needed in laying out and manufacturing Rambus motherboards. An NEC executive said PC makers still don't quite understand where to place capacitors on the motherboard, and how to deal with emission problems from the chassis.
Jay Bell, a senior fellow at Dell Computer Corp. (Austin, Texas), said that based on Dell's experience, system vendors should "pay close attention to your pcb [printed-circuit board] supplier." Dell is expected to put a line of Rambus-based desktops on the market in October, and Bell said he expects demand to be strong from big corporations that use PCs in large networks. As companies buy new desktops based on the Windows 2000 operating system, most will opt for Rambus models that will provide performance headroom for three years on average, he said.
Bell said Dell estimates that by mid-2000, fully half the DRAMs it buys will be Rambus parts.
One advantage of Rambus' extra memory bandwidth, Bell said, is that IT managers can run data backups, virus checkers and other "touches" to the networked PCs while the user continues to work with applications.
An IT manager could run a Laplink connection to a desktop and still leave the user with 85 percent of the system performance during a data backup, he said. A similarly configured system with SDRAM would leave only 67 percent of the available performance to the user, causing many to try to reboot their systems.
Bell showed preliminary benchmarks, running a test of Microsoft's Office2000 suite on a desktop in a networked environment. On Rambus systems, Microsoft Word ran significantly faster but other applications, such as Excel, actually ran slower than on SDRAM PCs.
While several system OEMs had prototype Rambus desktops on display at IDF, there were few benchmark comparisons between the Rambus and PC100 or PC133 desktops. Benchmarks won't be widely available until the commercial rollout in October, an Intel spokesman said. MacWilliams said he expects Rambus systems to deliver at least a third more usable bandwidth than an SDRAM-based system.
The 1.6-Gbyte/second peak bandwidth for the full-speed RDRAMs compares with a peak bandwidth of 1.06 Gbytes/s for the PC133 SDRAMs. "By tuning the system, we can get 90 percent effective bandwidth [compared with peak]," against about 60 to 70 percent for SDRAMs, MacWilliams said. "Overall, RDRAMs offers about 30 to 33 percent more bandwidth for memory-intensive applications."
While Dell hews to its traditional close ties to Intel's technology road map, other companies may strike at a gap in the Intel-based product line, putting PC133-based systems on the market for the Christmas selling season. Intel executives said the company's forthcoming PC133 chip set probably won't support the AGP4X port, sticking with a 2X port. There may be other differences as well, which could entice performance users to move to the Rambus technology, a classic Intel segmentation approach.
Tate said the Rambus technology, with its narrow 16-bit channel running at very high frequencies, was "a big, revolutionary kind of step. Revolutions are not done by committee. But now is a good time for the implementers forum to take the basic Rambus design and figure out commonly accepted ways to reduce the costs."
Tate said today's Rambus technology can easily be scaled upward by implementing more than one channel, putting two Rambus controllers on the chip set and doubling the available bandwidth to 3.2 Gbytes/s. At IDF, Intel showed a workstation based on the 840 chip set, still under development, which supports two Rambus channels.
MacWilliams said Intel's road map calls for notebook computers to begin adopting the Rambus technology in the fall of 2000, using a small-outline Rambus in-line memory module.
Also, Intel is looking at using RDRAM in "value" desktops. Integrating graphics onto the chip set and using a unified memory architecture that eliminates the frame buffer memory can reduce the number of components, thus shaving costs.