Gerhard Fettweis, a professor at the university here, is on a one-year sabbatical to help transfer the university-developed DSP technology and application-specific design style out of the academic arena and into the marketplace.

Fettweis has persuaded a former study colleague, Michael Bolle, to quit Robert Bosch GmbH, where Bolle worked on digital audio broadcasting, and, with first-round venture-capital backing of over $5 million, the two founded Systemonic. Fettweis is chief technology officer; Bolle is chief executive officer.

"The name stands for system on IC and [the startup] will develop a special class of integrated circuits for the telecommunication markets," said Bolle.

Tailored cores

Bolle said Systemonic would work with customers to apply its platform DSP approach to the design of application-specific or tailored DSP cores that will perform more efficiently, at lower cost, than the more general-purpose DSP cores currently available for license.

Fettweis said Systemonic has a unique technology for the rapid development of DSP chips. The Systemonic platform, he said, is distinguished by the fact that the DSPs it produces can be tailored to the special needs of the target application.

"Using this technology our customers, semiconductor companies and equipment manufacturers will gain a significant competitive advantage. Chip development times, which are currently in the range of one year, can be drastically reduced to a few months," said Bolle.

Fettweis added, "It's like VLIW [very long instruction word] but it is more compact. One of the key features is that we don't need a retargetable compiler to support the tailored DSP chips that will be produced, yet we still allow for customization."

In its use of a single C language compiler the Systemonic platform is similar to the ARC 32-bit RISC core from ARC Cores Ltd. (London), which supersedes the options of a configurable processor core with a single switchable compiler.

"We are aware of ARC but we [think] we are doing something quite different," Fettweis said. "Let's just say it's along the lines of compressed VLIW."

Despite using the term "platform" to describe the Systemonic approach Fettweis also emphasized differences from Philips Semiconductors' use of the term, where it refers to a mix-and-match style used to create new system chips quickly from RISC and DSP cores and software modules.

"Their [Philips'] platforms are a set of preconfigured blocks. You can't change the DSP core or the RISC core. The Systemonic DSP can be optimized in terms of the datapath and scaled in terms of the number of datapath elements," Fettweis said.

"Working at Bosch on the development of DAB [digital audio broadcasting] I realized that what is available as a synthesizable DSP core is hard to optimize for particular applications," Bolle said. "The cores are also very expensive, licensing terms being set at levels for semiconductor companies working across many markets. They are too expensive for system houses that are only thinking about one application."

To fill that need and price range, Systemonic plans to provide its design, development and support tools to system companies under license. However, each design will then be specific to a particular customer application and not a core that Systemonic will re-license to others.

Systemonic's first DSP is a 16-bit fixed-point design that it calls M3 for multimedia modem. "We expect silicon in October," said Bolle. The chip is being cast in 0.35-micron CMOS process technology at a Far Eastern foundry, Bolle said.

"It's in 0.35-micron CMOS because it's a prototype, he said. "It keeps costs down and this is not a product but a proof of concept. Performance per die area is the main issue right now but power efficiency is something we could also demonstrate."

Fettweis said he believes Systemonic's working prototype will impress potential customers and jump start the company's development. "We already have a C compiler in alpha release and debugger, instruction set simulator and assembler," he said.