To accommodate the many incompatible network interfaces, network processors have emphasized flexibility, usually by using configurable CPU cores. But Zilog, with its Cartezian Communications Engine, has taken the flexibility concept to the point of offering the processor as a soft core.

The result is essentially a do-it-yourself processor, designed by the customer but manufactured by Zilog via foundries. Zilog touts the approach as offering design flexibility without the penalty of additional design time.

Soft cores are a new area for Zilog. Company officials announced in June that they were working on configurable processor cores through an alliance with Production Languages Corp. (Fort Worth, Texas). But Zilog is marketing Cartezian as a chip, not as intellectual property. "The end result is still a piece of silicon," said Didier Le Lannic, senior vice president of Zilog's communications business unit.

Chip veteran Zilog joins a market crowded with network-processor startups, three of which are slated to announce products this week—Entridia, Maker, and Stargate. But Zilog officials believe theirs is the only soft-core product being proposed.

"This is a big step for them compared with their traditional products," said Dataquest analyst Joseph Byrne. "It'll bring them new markets but also new challenges."

The move makes sense considering Zilog's new image. Purchased by Texas Pacific Group in 1997, the company was remade under new chief executive Curtis Crawford and is beginning to show its new image.

"Zilog is positioning itself as a communications-centric company, and Curtis Crawford does come out of Lucent; that does give them some advantage in dealing with potential customers," Byrne said.

Partnerships pay off

Cartezian is a combination of technologies: a configurable 32-bit core licensed from Tensilica Inc. (Santa Clara, Calif.), a 16-bit soft core from PLC and some of Zilog's own technology.

The Tensilica core is used as a central processor. It is a 200-Mips, 32-bit synthesizable RISC-based core that includes the processing power of a DSP. The 16-bit, 150-Mips edge processors likewise follow the RISC/DSP format but have to be tailored to connect to specific networking peripherals, such as Ethernet media-access control or asynchronous-transfer-mode segmentation and reassembly.

For both the central and edge processors, the RISC instructions are used for frame management and memory management, whereas the DSP calculations handle algorithmic computations and security.

Cartezian resembles Intel Corp.'s IXP1200 and IBM Corp.'s Rainier in that it surrounds a central microprocessor with a ring of edge processors, a setup that doesn't choke on the incoming flow of packets the way a lone processor can. As with Intel's and IBM's architectures, the idea is to avoid distracting the central CPU with constant interrupts as signals come in.

"We will basically offer a capability to not drop any packets; we will process all packets simultaneously," Le Lannic said.

Zilog's additional contribution, however, is in making Cartezian a soft core— malleable both in terms of size and the instruction set it obeys#0151; and in supplying the tools necessary for compiling and debugging it.

In fact, even the manufacturing technology is changeable: Cartezian can be built to 0.5-0.35-, 0.25- or 0.18-micron geometries. Zilog will use foundries to manufacture the part; the process of porting a design to a foundry should take about two months, Le Lannic said.

"They're sort of trying to set [themselves up as being] between a pure fabless merchant, like us, and a Cadence Design [Systems Inc.]," said Dave Husak, chief technical officer for C-Port Corp. (North Andover, Mass.), which is producing a configurable 18-CPU network processor.

C-Port, unlike Zilog, is developing a high-end part whose configurable interfaces will allow it to become a universal standard. One major difference with Zilog's approach is that C-Port won't have to generate tool sets for each configuration.

"[Our approach] probably isn't possible with [Zilog's] part, because the combinatorics would just kill you," Husak said. "They may be relying on there being six or seven versions everybody wants, and not 100."

Cartezian will be available in two varieties: Cartezian Router and Cartezian Switch. Target applications include small-office routers, central-office digital subscriber line access multiplexers and various line cards.

Software is key to the effort. Processor-specific tools are generated at the same time as the processor's RTL file. Zilog thus can offer a tool set geared toward whatever instruction set the customer chooses without the typical six- to 12-month development time, Le Lannic said.

Le Lannic considers that capability a big advantage over other net processor vendors. "They manufacture silicon and don't touch the software at all," he said.

The entire Cartezian core can be tested in software before going to silicon, he said.

Creating tools is crucial since the tools are dependent on the instruction set, and the choice of instruction set is up to the user. Le Lannic likened the situation to instruction-set extensions such as Intel's MMX. "Every time they add an instruction, they need to create and test a new compiler and a new debugger," he said.

Intel doesn't provide the peripherals needed for the net processor to communicate with a network, he noted. Zilog has manufactured such parts for years and will provide them for its network processor-one way Cartezian plays off Zilog's traditional strengths, he said.

Open software stacks

Cartezian also includes certain key software stacks, such as TCP/IP for Internet connectivity and H.323 for voice-over-Internet Protocol processing. Zilog is making those stacks open to the user. "That's kind of new," Le Lannic said. "People consider [the software stack] their crown jewel and don't want to let it go."

The complete Cartezian product, including the soft core and software, will be available in early 2000, he said. Software tools are available now, including the compiler, assembler, linker, debugger and instruction-set simulator. Pricing has not yet been decided.

The initial development versions of Cartezian will be small-probably 160,000 to 180,000 gates, Le Lannic said. He estimated that full-production versions of Cartezian Router will measure 500,000 to 800,000 gates and that Cartezian Switch chips could be as large as 4 million gates.