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DSP simulators work the links to silicon








EE Times


ORLANDO, Fla.— Developers of DSP algorithms have had a harder time of it than EDA vendors in trying to turn high-level simulation models into working silicon, largely because the most popular tools have not provided easy pathways to either custom or standalone general-purpose DSPs. That situation is expected to change significantly with software introductions at the DSP World show here this week.

The MathWorks Inc. (Natick, Mass.) is expected to announce extensions to its popular Matlab and SimuLink simulator tool set that will make it easier to convert floating-point algorithms to fixed math processes. The company is also expected to announce an agreement with Motorola Semiconductor (Austin, Texas) to support its DSP56000 family. And Bops Inc. (Palo Alto, Calif.) has perfected a means of bringing Matlab C code into a custom DSP silicon implementation, one that takes advantage of hardware parallelism to extract high performance.

Elanix Inc. (Westlake Village, Calif.), meanwhile, will announce new methods of bringing high-level algorithms to implementations on the C600 series of Texas Instruments Inc. VLIW processors. And DSP simulator developer Axys Design Automation Inc. (Irvine, Calif.) will announce instruction set models for DSP Group's (Santa Clara, Calif.) Oak DSP core and simulators for Conexant Systems Inc.'s (Newport Beach, Calif.) multicore communication devices.

Although Matlab is one of the most popular algorithm development tools, transforming simulation results into C language or assembly code that can run on a general-purpose DSP— or be used to implement custom silicon*— still has problems, said Ken Karnofsky, MathWorks' DSP marketing manager. The company is dealing with the challenge by creating models and model libraries that either talk to specific processors or to specific application functions.

As part of its focus on communications, The MathWorks is introducing the Quantized Filtering Toolbox, a software tool that will help convert floating-point algorithms to fixed-point implementations, along with DSP implementations on ASICs and FPGAs. The filter design and analysis tool lets designers visualize the effects of fixed-point and custom-precision floating-point filters on DSP waveforms. Until now, developers did this by generating double-precision floating-point coefficients and then manually converting them to fixed-point or custom-precision implementations, Karnofsky explained.

By experimenting with filter response characteristics, such as frequency response, pole-zero response and impulse response, users can choose a smaller word length that requires less memory and a narrower database to implement, thus reducing costs in the final hardware implementation. The Quantized Filtering Toolbox makes possible word lengths of up to 52 bits for fixed-point formats and up to 64 bits for custom-precision floating-point formats.

Also slated for debut at DSP World is a tool MathWorks co-developed with Motorola that simulates and tests algorithms for Motorola's 56300 and 56600 families of fixed-point DSPs. The Motorola DSP Developer's Kit integrates Motorola's DSP56000 development environment with The MathWorks' Simulink and Matlab DSP design tools. The move is intended to provide improved design flow to Motorola's DSP customers, said Andy Barth, Motorola's manager for DSP simulation tools.

Beyond Matlab

Few manufacturers are as acutely aware of Matlab's shortcomings as Bops. At DSP World, the company will introduce its Compiler for Matlab, which allows direct conversion of Matlab "M code" to optimized parallel assembly code for Bops' custom ManArray DSPs.

Bops intends to foster high performance by providing a relatively tight coupling between C language compilers and custom silicon with an extremely high degree of parallelism. The Bops ManArray cores will execute very long instruction words compiled by the Bops compiler.

The Bops Compiler for Matlab preserves the inherent parallelism of the Matlab language, said Rick Kepple, Bops' vice president of sales and marketing. Ordinarily, converting Matlab simulator code to parallel C is a two-step process, in which C code is first generated from Matlab and then compiled by the target DSP. But the process loses some of the parallelism available in the top-level algorithm. The Bops compiler not only generates VLIW parallel instructions but also maps them across an array of processing elements. Data types can be either floating- or fixed-point.

Bops developers can now leverage an existing Matlab simulation environment to generate optimized parallel assembly code for the Bops DSP cores, thus reducing development time. Developers can generate optimized assembly code directly, eliminating the Matlab M-to-C translation step. This also eliminates the costly burden of maintaining and synchronizing Matlab with other C simulation environments, Kepple said.

Elanix is another company concerned with the link between high-level algorithm development and an actual silicon implementation, and its new partnership with Texas Instruments addresses that issue. Elanix' new tool, the SystemView TMS320C6000 DSP Design Suite, supports TI's C6000 family. SystemView enables simulation of bit-true fixed- and floating-point DSP system designs; C-code generation; and integration with Code Composer Studio for rapid prototyping, real-time analysis and debug. The tool supports TI's recently announced eXpressDSP environment, designed as a step toward a universal DSP operating system and algorithm development standard.

The first release of the Windows-based development tool combines system-level simulation and analysis, automatic C-code generation from indi- vidual SystemView blocks, an open interface for third-party library integration and real-time validation, debug and optimization through Code Composer Studio, according to Geoffrey Chatfield, Elanix' vice president of marketing. The second release, planned for the first half of 2000, will include enhancements to generate C code automatically to the eXpressDSP Algorithm Standard from single blocks, subsystems or entire systems created with SystemView.

Axys Design Automation, meanwhile, will announce support for DSP cores, introducing modeling tools for both Conexant's multiprocessor cores and the DSP Group's Oak core.

Joint development work with Conexant has already produced SuperSim, a smart-model technology, and MaxSim, an extension of the fast single-core simulation to cover complete systems-on-chip containing multiple DSP and microcontroller cores, accelerators and peripherals, said Axys president Vojin Zivojnovic. The new tool (and its open API) should enable users to develop their own multicore simulation platforms, integrating their favorite processor cores and peripherals, Zivojnovic said. Based on C/C++, the SuperSim and MaxSim modeling technologies offer full-cycle accuracy at simulation speeds above 10,000 cycles per second for complex targets, Zivojnovic said.











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