PixelFusion has parted company with Ian Lazenby, its former chief executive officer, and promoted U.S. executive Ilene Sterns, previously vice president of marketing, to that job.

Sterns, who is relocating to England from Silicon Valley, said Lazenby's departure was amicable and that PixelFusion is on course to introduce its Fuzion 150 chip later this year. It was originally scheduled for the fourth quarter of 1999.

"We have just received another round of funding and have moved on from being a startup to a mid-stage company," she said. "As you move forward you need management with different skills." Sterns said Lazenby served the company well in its startup phase and would probably repeat that role at another startup.

Sterns' appointment coincides with a round of funding that raised about $16 million from U.K. investors. That brings the company's total of raised equity to roughly $40 million since PixelFusion's founding in April 1997. The company's business plan includes both chip sales and intellectual-property licensing.

Partnership scotched?

But the company has suffered setbacks in the last few months. Besides running late with its Fuzion 150, Sterns said the partnership with board maker Number Nine Visual Technologies Corp. (Lexington, Mass.), announced last August, might fall through. "Number Nine has been acquired by S3," she said. "We may not end up with S3 as a partner but we are still talking with a number of potential partners."

As to the Fuzion 150 chip itself, Sterns said, "Tape-out is imminent and we are aggressively moving into new markets. We started by targeting 3-D graphics and high-performance workstations but the chip is also well-suited to video broadcast. We are also beginning to explore network processing."

The chip is a 50-million-transistor monster said to be capable of more than 1.5 teraops, or 3 Gigaflops, of computing power. It includes 24 Mbits of on-chip DRAM and has been designed for a 0.25-micron embedded-DRAM process at Taiwanese foundry UMC Group.

An ARC 32-bit RISC processor, designed under a license from ARC Cores Ltd., serves as a "housekeeping" controller. But the forecast performance of the chip comes from its array of simple processing elements that can cut through wide swaths of data in parallel.