While the company does not expect the delay to hurt revenues for the rest of the year, the move is yet another pothole in the bumpy road of deploying Rambus memory technology.

Intel has confirmed that there are persistent bugs in the design of its memory translation hub (MTH) component, and rather than attempt to correct the problems, the company will design a new part from scratch. The MTH is a discrete chip that is currently used alongside Intel's 820 chipset, and is used to link parts originally designed for Rambus DRAM technology to standard SDRAM.

The 820 chipset was launched last year, and was considered the final link in the RDRAM chain, a chipset that supports the high-speed memory format and a standard Pentium-class processor. But strong customer support for the Rambus format has yet to emerge, and Intel developed the MTH to allow customers to use the chipset with less-expensive SDRAM. Dean McCarron, principal analyst for Mercury Research (Scottsdale, Ariz.), said that his estimates show about three-quarters of the 820 chipsets shipped in the first quarter of this year were intended to work with SDRAM. "A lot of people are using the MTH," he noted.

The MTH was also intended to be a key part of Intel's Timna launch, which was originally scheduled for the second half of this year. The Timna processor includes the components generally associated with the North Bridge part of the chipset, including a Rambus memory controller.

The company has been developing this part for several years, and originally expected RDRAM to be the dominant memory format throughout the PC market, including the low-end of the spectrum where the highly-integrated Timna is aimed.

However, with RDRAM seeing low usage overall, and with high prices almost certain to keep the technology out of the Timna's expected low-cost PC segment, Intel has been planning to use the MTH as a means to launch the processor with SDRAM support. By designing an entirely new memory interface product, the company has been forced to push back the Timna launch until a chip that can link it to SDRAM is available. The new schedule calls for both parts to be available in volume in the first quarter of next year.

Rick Doherty, director of research for Envisioneering Group Corp. (Seaford, N.Y.), said that this means the Timna part will not be available for the holiday shopping season, although the extra time will give Intel the chance to build up its inventories of the Timna chips.

The company is planning to shift the manufacturing capacity that had been allocated to Timna back to Pentium III and Celeron chips. Demand for those parts has been very high this year, and Intel should have no trouble selling these processors, which means they may actually post higher revenues than if they were shipping Timna in volume.

However, the flaws are yet another black eye for Rambus technology. The 820 chipset was delayed several times last year, as Intel had difficulty working out the final bugs. It has been available since last fall, but that has not translated into high sales volumes for RDRAM chips, with their high price seen as one of the main problems.

"As people start pushing these very high memory bandwidths, real-world problems start to emerge that can't show up in simulation," Doherty said.

The bugs in the MTH seem to emerge under a very specific combination of voltage and temperature, according to an Intel spokesman, which leads to circuit failure. Although Intel has identified the root cause of the problems, it has decided that a new part is an easier solution than fixing the MTH.

The revised memory interface will only be offered for use with the Timna, and not the 820 chipset. That chipset was expected to be used with RDRAM technology only, and it the company apparently wants to push the industry back on this path. The Timna launch will also come shortly after Intel rolls out its newest high-performance chip, Willamette, which will only use RDRAM technology, and the company is very eager to promote the faster memory format.