With a pipeline twice as long as its predecessor's and a 400-MHz front-side bus, Pentium 4 promises to deliver performance aplenty. It is based on a completely new architecture, called NetBurst, which supports data transfers over networks.The chip set for the device — the 850, or Tehama — supports a dual-channel Rambus technology with bandwidth of up to 3.2 Gbytes/second.

The Pentium 4 "is based on a good architecture, but it's too bad it is bogged down by the whole Rambus issue," said Janet Ramkissoon, an analyst at Quadra Capital. "It is an economic issue, because the Rambus modules can cost as much as four times as much [as SDRAM modules]."

The device is based on a 20-stage pipeline, twice the depth of the 10-stage pipeline in the Pentium III. To keep all these stages busy, Intel has enhanced the branch prediction capability and created a speculative execution engine that can juggle up to 126 instructions simultaneously, three times as many as the Pentium III can work on at once.

The design's 400-MHz front-side bus — three times as fast as the 133-MHz bus on the Pentium III — is said to be "very scalable," and Intel expects to ship Pentium 4s with even faster bus speeds.

The first iteration, code-named Willamette, is due for launch next quarter. Built in an 0.18-micron process, it packs some 42 million transistors. Though Intel did not disclose the die size, analysts said the transistor count could make the Pentium 4 a full 50 percent bigger than the most complex Pentium IIIs, with 28 million transistors.

Pricing also has not been released, but the current flagship MPU, the 1.13-GHz Pentium III, is priced above $900, and Willamette will be the same ballpark. In July, Intel posted on its Web site benchmarks for identical Pentium III systems, one with the Rambus 820 chip set and another with the 815 chip set, which supports PC133 DRAMs. The two finished in a dead heat.

Those benchmarks "were not the kind of news we wanted to hear," said Avo Kanadjian, marketing manager at Rambus Inc. (Mountain View, Calif.). "But please remember that the 815 chip set has been optimized over five generations, and the 820 has not gone through that kind of tuning process. But with the Pentium 4, we have two Rambus channels, and the 850 chip set draws upon the very successful 840 dual-channel chip set for the workstation space."

With demand low, memory vendors have not been producing RDRAM chips in high volumes. "The Willamette can't be supported by the volume of RDRAM chips that we are forecasting," said Tony Massimini, chief of technology for Semico Research Corp. (Phoenix). "The only way that processor will ramp is with a chip set that links it to SDRAM."

Intel said last month it would develop a chip set for Willamette that supports PC133 SDRAM, for release in late 2001. The company is also evaluating whether to create a second chip set to support the faster, double-data-rate DRAM.

Additional reporting by David Lammers.